feat: 添加GD32E508 DCU应用工程的初始结构
- 新增完整的CMSIS解决方案配置,包含AC6/GCC/IAR/CLANG编译器支持 - 添加项目配置文件,定义了设备层、系统层、应用层的模块结构 - 配置ARM::CMSIS和GigaDevice::GD32E50x_DFP软件包依赖 - 创建多层代码架构:应用入口(main)、系统层(sys)、设备层(device) - 实现任务管理系统,包含任务调度器和任务执行器分离设计 - 集成ADC、CANFD、定时器、串口、温度采样等核心功能模块 - 添加详细的README文档说明项目结构和代码组织方式 - 配置AC6链接脚本和运行时环境文件 - 设置Git忽略规则以排除编译产物和临时文件
This commit is contained in:
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/*!
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\file gd32e50x_fmc.c
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\brief FMC driver
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\version 2026-02-09, V1.7.0, firmware for GD32E50x
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*/
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/*
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Copyright (c) 2025, GigaDevice Semiconductor Inc.
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Redistribution and use in source and binary forms, with or without modification,
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are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice, this
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list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright notice,
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this list of conditions and the following disclaimer in the documentation
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and/or other materials provided with the distribution.
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3. Neither the name of the copyright holder nor the names of its contributors
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may be used to endorse or promote products derived from this software without
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specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
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OF SUCH DAMAGE.
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*/
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#include "gd32e50x_fmc.h"
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/* FMC mask */
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#define LOW_8BITS_MASK ((uint32_t)0x000000FFU)
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#define HIGH_8BITS_MASK ((uint32_t)0x0000FF00U)
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#define LOW_8BITS_MASK1 ((uint32_t)0x00FF0000U)
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#define HIGH_8BITS_MASK1 ((uint32_t)0xFF000000U)
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#define LOW_16BITS_MASK ((uint32_t)0x0000FFFFU)
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#define HIGH_16BITS_MASK ((uint32_t)0xFFFF0000U)
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/* USER of option bytes mask */
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#define OB_USER_MASK ((uint8_t)0x38U)
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/* default offset */
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#define FMC_OBSTAT_USER_OFFSET 2U
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#define FMC_OBSTAT_DATA_OFFSET 10U
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/* return the FMC state */
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static fmc_state_enum fmc_state_get(void);
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/* check FMC ready or not */
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static fmc_state_enum fmc_ready_wait(uint32_t timeout);
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/*!
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\brief unlock the main FMC operation
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it is better to used in pairs with fmc_lock
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\param[in] none
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\param[out] none
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\retval none
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*/
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void fmc_unlock(void)
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{
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if(RESET != (FMC_CTL & FMC_CTL_LK)){
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/* write the FMC unlock key */
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FMC_KEY = UNLOCK_KEY0;
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FMC_KEY = UNLOCK_KEY1;
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}
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}
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/*!
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\brief lock the main FMC operation
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it is better to used in pairs with fmc_unlock after an operation
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\param[in] none
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\param[out] none
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\retval none
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*/
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void fmc_lock(void)
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{
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/* set the LK bit */
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FMC_CTL |= FMC_CTL_LK;
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}
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/*!
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\brief set the wait state
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\param[in] wscnt: wait state
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only one parameter can be selected which is shown as below:
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\arg FMC_WAIT_STATE_0: 0 wait state added
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\arg FMC_WAIT_STATE_1: 1 wait state added
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\arg FMC_WAIT_STATE_2: 2 wait state added
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\arg FMC_WAIT_STATE_3: 3 wait state added
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\arg FMC_WAIT_STATE_4: 4 wait state added
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\param[out] none
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\retval none
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*/
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void fmc_wscnt_set(uint32_t wscnt)
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{
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uint32_t ws;
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ws = FMC_WS;
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/* set the wait state counter value */
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ws &= ~FMC_WS_WSCNT;
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FMC_WS = (ws | wscnt);
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}
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/*!
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\brief enable pre-fetch
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\param[in] none
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\param[out] none
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\retval none
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*/
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void fmc_prefetch_enable(void)
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{
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FMC_WS |= FMC_WS_PFEN;
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}
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/*!
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\brief disable pre-fetch
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\param[in] none
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\param[out] none
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\retval none
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*/
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void fmc_prefetch_disable(void)
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{
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FMC_WS &= ~FMC_WS_PFEN;
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}
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/*!
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\brief enable IBUS cache
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\param[in] none
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\param[out] none
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\retval none
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*/
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void fmc_ibus_enable(void)
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{
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FMC_WS |= FMC_WS_ICEN;
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}
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/*!
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\brief disable IBUS cache
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\param[in] none
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\param[out] none
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\retval none
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*/
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void fmc_ibus_disable(void)
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{
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FMC_WS &= ~FMC_WS_ICEN;
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}
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/*!
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\brief reset IBUS cache
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\param[in] none
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\param[out] none
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\retval none
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*/
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void fmc_ibus_reset(void)
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{
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FMC_WS |= FMC_WS_ICRST;
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}
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/*!
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\brief enable DBUS cache
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\param[in] none
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\param[out] none
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\retval none
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*/
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void fmc_dbus_enable(void)
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{
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FMC_WS |= FMC_WS_DCEN;
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}
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/*!
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\brief disable DBUS cache
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\param[in] none
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\param[out] none
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\retval none
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*/
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void fmc_dbus_disable(void)
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{
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FMC_WS &= ~FMC_WS_DCEN;
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}
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/*!
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\brief reset DBUS cache
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\param[in] none
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\param[out] none
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\retval none
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*/
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void fmc_dbus_reset(void)
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{
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FMC_WS |= FMC_WS_DCRST;
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}
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/*!
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\brief FMC erase page
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\param[in] page_address: target page address
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\param[out] none
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\retval state of FMC
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\arg FMC_READY: the operation has been completed
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\arg FMC_PGERR: program error
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\arg FMC_PGAERR: program alignment error
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\arg FMC_WPERR: erase/program protection error
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\arg FMC_TOERR: timeout error
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*/
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fmc_state_enum fmc_page_erase(uint32_t page_address)
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{
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fmc_state_enum fmc_state;
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/* wait for the FMC ready */
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fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
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if(FMC_READY == fmc_state){
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/* start page erase */
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FMC_CTL |= FMC_CTL_PER;
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FMC_ADDR = page_address;
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FMC_CTL |= FMC_CTL_START;
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/* wait for the FMC ready */
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fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
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/* reset the PER bit */
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FMC_CTL &= ~FMC_CTL_PER;
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}
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/* return the FMC state */
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return fmc_state;
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}
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/*!
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\brief FMC erase whole chip
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\param[in] none
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\param[out] none
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\retval state of FMC
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\arg FMC_READY: the operation has been completed
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\arg FMC_PGERR: program error
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\arg FMC_PGAERR: program alignment error
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\arg FMC_WPERR: erase/program protection error
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\arg FMC_TOERR: timeout error
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*/
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fmc_state_enum fmc_mass_erase(void)
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{
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fmc_state_enum fmc_state;
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/* wait for the FMC ready */
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fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
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if(FMC_READY == fmc_state){
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/* start chip erase */
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FMC_CTL |= FMC_CTL_MER;
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FMC_CTL |= FMC_CTL_START;
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/* wait for the FMC ready */
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fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
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/* reset the MER bit */
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FMC_CTL &= ~FMC_CTL_MER;
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}
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/* return the FMC state */
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return fmc_state;
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}
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/*!
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\brief FMC program a word at the corresponding address
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\param[in] address: address to program
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\param[in] data: word to program
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\param[out] none
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\retval state of FMC
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\arg FMC_READY: the operation has been completed
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\arg FMC_PGERR: program error
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\arg FMC_PGAERR: program alignment error
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\arg FMC_WPERR: erase/program protection error
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\arg FMC_TOERR: timeout error
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*/
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fmc_state_enum fmc_word_program(uint32_t address, uint32_t data)
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{
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fmc_state_enum fmc_state;
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/* wait for the FMC ready */
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fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
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if(FMC_READY == fmc_state){
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/* set the PG bit to start program */
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FMC_CTL |= FMC_CTL_PG;
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REG32(address) = data;
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/* wait for the FMC ready */
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fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
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/* reset the PG bit */
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FMC_CTL &= ~FMC_CTL_PG;
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}
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/* return the FMC state */
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return fmc_state;
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}
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/*!
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\brief unlock the option bytes operation
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it is better to used in pairs with ob_lock
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\param[in] none
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\param[out] none
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\retval none
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*/
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void ob_unlock(void)
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{
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if(RESET == (FMC_CTL & FMC_CTL_OBWEN)){
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/* write the FMC ob unlock key */
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FMC_OBKEY = UNLOCK_KEY0;
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FMC_OBKEY = UNLOCK_KEY1;
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}
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}
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/*!
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\brief lock the option bytes operation
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it is better to used in pairs with ob_unlock after an operation
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\param[in] none
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\param[out] none
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\retval none
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*/
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void ob_lock(void)
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{
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/* reset the OBWEN bit */
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FMC_CTL &= ~FMC_CTL_OBWEN;
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}
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/*!
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\brief erase the option bytes
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programmer must ensure FMC & option bytes are both unlocked before calling this function
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\param[in] none
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\param[out] none
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\retval state of FMC
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\arg FMC_READY: the operation has been completed
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\arg FMC_PGERR: program error
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\arg FMC_PGAERR: program alignment error
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\arg FMC_WPERR: erase/program protection error
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\arg FMC_TOERR: timeout error
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\arg FMC_OB_HSPC: high security protection
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*/
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fmc_state_enum ob_erase(void)
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{
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uint32_t temp_spc;
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fmc_state_enum fmc_state;
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/* wait for the FMC ready */
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fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
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temp_spc = OB_SPC_USER;
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/* check the option bytes security protection value */
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if((RESET != ob_security_protection_flag_get()) && (FMC_HSPC == (temp_spc & LOW_8BITS_MASK))){
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fmc_state = FMC_OB_HSPC;
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}
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if(FMC_READY == fmc_state){
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/* start erase the option bytes */
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FMC_CTL |= FMC_CTL_OBER;
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FMC_CTL |= FMC_CTL_START;
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/* wait for the FMC ready */
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fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
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if(FMC_READY == fmc_state){
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/* reset the OBER bit and enable the option bytes programming */
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FMC_CTL &= ~FMC_CTL_OBER;
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/* set the OBPG bit */
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FMC_CTL |= FMC_CTL_OBPG;
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/* restore the last get option bytes security protection code */
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OB_SPC_USER = (temp_spc & LOW_8BITS_MASK) | LOW_8BITS_MASK1;
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/* wait for the FMC ready */
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fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
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/* reset the OBPG bit */
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FMC_CTL &= ~FMC_CTL_OBPG;
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}else{
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/* reset the OBER bit */
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FMC_CTL &= ~FMC_CTL_OBER;
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}
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}
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/* return the FMC state */
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return fmc_state;
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}
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/*!
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\brief enable write protection
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programmer must ensure FMC & option bytes are both unlocked before calling this function
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\param[in] ob_wp: specify sector to be write protected
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only one parameter can be selected which are shown as below:
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\arg OB_WP_NONE: disable all write protection
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\arg OB_WP_x(x=0..31): write protect specify sector
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\arg OB_WP_ALL: write protect all sector
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\param[out] none
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\retval state of FMC
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\arg FMC_READY: the operation has been completed
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\arg FMC_PGERR: program error
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\arg FMC_PGAERR: program alignment error
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\arg FMC_WPERR: erase/program protection error
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\arg FMC_TOERR: timeout error
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\arg FMC_OB_HSPC: high security protection
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*/
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fmc_state_enum ob_write_protection_enable(uint32_t ob_wp)
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{
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uint32_t temp_spc;
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uint8_t i;
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uint32_t op_byte[4];
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fmc_state_enum fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
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temp_spc = OB_SPC_USER;
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/* check the option bytes security protection value */
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if((RESET != ob_security_protection_flag_get()) && (FMC_HSPC == (temp_spc & LOW_8BITS_MASK))){
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fmc_state = FMC_OB_HSPC;
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}
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for(i = 0U; i < 4U; i++){
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op_byte[i] = OP_BYTE(i);
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}
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ob_wp = (uint32_t)(~ob_wp);
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op_byte[2] = (ob_wp & LOW_8BITS_MASK) | ((ob_wp & HIGH_8BITS_MASK) << 8);
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op_byte[3] = ((ob_wp & LOW_8BITS_MASK1) >> 16) | ((ob_wp & HIGH_8BITS_MASK1) >> 8);
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if(FMC_READY == fmc_state){
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/* start erase the option byte */
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FMC_CTL |= FMC_CTL_OBER;
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FMC_CTL |= FMC_CTL_START;
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/* wait for the FMC ready */
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fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
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if(FMC_READY == fmc_state){
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/* reset the OBER bit and enable the option bytes programming */
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FMC_CTL &= ~FMC_CTL_OBER;
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FMC_CTL |= FMC_CTL_OBPG;
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for(i = 0U; i < 4U; i++){
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OP_BYTE(i) = op_byte[i];
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/* wait for the FMC ready */
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fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
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if(FMC_READY != fmc_state){
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break;
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}
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}
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/* reset the OBPG bit */
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FMC_CTL &= ~FMC_CTL_OBPG;
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}else{
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/* reset the OBER bit */
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FMC_CTL &= ~FMC_CTL_OBER;
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}
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}
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/* return the FMC state */
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return fmc_state;
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}
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/*!
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\brief configure security protection
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programmer must ensure FMC & option bytes are both unlocked before calling this function
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\param[in] ob_spc: specify security protection
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only one parameter can be selected which is shown as below:
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\arg FMC_NSPC: no security protection
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\arg FMC_LSPC: low security protection
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\arg FMC_HSPC: high security protection
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\param[out] none
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\retval state of FMC
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\arg FMC_READY: the operation has been completed
|
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\arg FMC_PGERR: program error
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||||
\arg FMC_PGAERR: program alignment error
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\arg FMC_WPERR: erase/program protection error
|
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\arg FMC_TOERR: timeout error
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\arg FMC_OB_HSPC: high security protection
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*/
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fmc_state_enum ob_security_protection_config(uint8_t ob_spc)
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{
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uint32_t temp_spc;
|
||||
uint8_t i;
|
||||
uint32_t op_byte[4];
|
||||
|
||||
fmc_state_enum fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
|
||||
|
||||
temp_spc = OB_SPC_USER & LOW_16BITS_MASK;
|
||||
|
||||
/* check the option bytes security protection value */
|
||||
if((RESET != ob_security_protection_flag_get()) && (FMC_HSPC == (temp_spc & LOW_8BITS_MASK))){
|
||||
fmc_state = FMC_OB_HSPC;
|
||||
}
|
||||
|
||||
for(i = 0U; i < 4U; i++){
|
||||
op_byte[i] = OP_BYTE(i);
|
||||
}
|
||||
op_byte[0] = ((uint32_t)(ob_spc)) | ((op_byte[0] & HIGH_16BITS_MASK));
|
||||
|
||||
if(FMC_READY == fmc_state){
|
||||
/* start erase the option bytes */
|
||||
FMC_CTL |= FMC_CTL_OBER;
|
||||
FMC_CTL |= FMC_CTL_START;
|
||||
|
||||
/* wait for the FMC ready */
|
||||
fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
|
||||
|
||||
if(FMC_READY == fmc_state){
|
||||
/* reset the OBER bit and enable the option bytes programming */
|
||||
FMC_CTL &= ~FMC_CTL_OBER;
|
||||
FMC_CTL |= FMC_CTL_OBPG;
|
||||
|
||||
for(i = 0U; i < 4U; i++){
|
||||
OP_BYTE(i) = op_byte[i];
|
||||
/* wait for the FMC ready */
|
||||
fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
|
||||
if(FMC_READY != fmc_state){
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/* reset the OBPG bit */
|
||||
FMC_CTL &= ~FMC_CTL_OBPG;
|
||||
}else{
|
||||
/* reset the OBER bit */
|
||||
FMC_CTL &= ~FMC_CTL_OBER;
|
||||
}
|
||||
}
|
||||
|
||||
/* return the FMC state */
|
||||
return fmc_state;
|
||||
}
|
||||
|
||||
/*!
|
||||
\brief program option bytes USER
|
||||
programmer must ensure FMC & option bytes are both unlocked before calling this function
|
||||
\param[in] ob_fwdgt: option bytes free watchdog value
|
||||
only one parameter can be selected which is shown as below:
|
||||
\arg OB_FWDGT_SW: software free watchdog
|
||||
\arg OB_FWDGT_HW: hardware free watchdog
|
||||
\param[in] ob_deepsleep: option bytes deepsleep reset value
|
||||
only one parameter can be selected which is shown as below:
|
||||
\arg OB_DEEPSLEEP_NRST: no reset when entering deepsleep mode
|
||||
\arg OB_DEEPSLEEP_RST: generate a reset instead of entering deepsleep mode
|
||||
\param[in] ob_stdby:option bytes standby reset value
|
||||
only one parameter can be selected which is shown as below:
|
||||
\arg OB_STDBY_NRST: no reset when entering standby mode
|
||||
\arg OB_STDBY_RST: generate a reset instead of entering standby mode
|
||||
\param[out] none
|
||||
\retval state of FMC
|
||||
\arg FMC_READY: the operation has been completed
|
||||
\arg FMC_PGERR: program error
|
||||
\arg FMC_PGAERR: program alignment error
|
||||
\arg FMC_WPERR: erase/program protection error
|
||||
\arg FMC_TOERR: timeout error
|
||||
\arg FMC_OB_HSPC: high security protection
|
||||
*/
|
||||
fmc_state_enum ob_user_write(uint8_t ob_fwdgt, uint8_t ob_deepsleep, uint8_t ob_stdby)
|
||||
{
|
||||
uint32_t temp_spc;
|
||||
uint8_t temp;
|
||||
uint8_t i;
|
||||
uint32_t op_byte[4];
|
||||
|
||||
fmc_state_enum fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
|
||||
|
||||
temp_spc = OB_SPC_USER;
|
||||
|
||||
/* check the option bytes security protection value */
|
||||
if((RESET != ob_security_protection_flag_get()) && (FMC_HSPC == (temp_spc & LOW_8BITS_MASK))){
|
||||
fmc_state = FMC_OB_HSPC;
|
||||
}
|
||||
|
||||
for(i = 0U; i < 4U; i++){
|
||||
op_byte[i] = OP_BYTE(i);
|
||||
}
|
||||
temp = ((uint8_t)((uint8_t)(((uint8_t)(ob_fwdgt) | ob_deepsleep) | ob_stdby)) | (OB_USER_MASK));
|
||||
op_byte[0] = ((uint32_t)(temp) << 16U) | ((op_byte[0] & LOW_16BITS_MASK));
|
||||
|
||||
if(FMC_READY == fmc_state){
|
||||
/* start erase the option bytes */
|
||||
FMC_CTL |= FMC_CTL_OBER;
|
||||
FMC_CTL |= FMC_CTL_START;
|
||||
/* wait for the FMC ready */
|
||||
fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
|
||||
if(FMC_READY == fmc_state){
|
||||
/* reset the OBER bit and enable the option bytes programming */
|
||||
FMC_CTL &= ~FMC_CTL_OBER;
|
||||
FMC_CTL |= FMC_CTL_OBPG;
|
||||
|
||||
for(i = 0U; i < 4U; i++){
|
||||
OP_BYTE(i) = op_byte[i];
|
||||
/* wait for the FMC ready */
|
||||
fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
|
||||
if(FMC_READY != fmc_state){
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/* reset the OBPG bit */
|
||||
FMC_CTL &= ~FMC_CTL_OBPG;
|
||||
}else{
|
||||
/* reset the OBER bit */
|
||||
FMC_CTL &= ~FMC_CTL_OBER;
|
||||
}
|
||||
}
|
||||
/* return the FMC state */
|
||||
return fmc_state;
|
||||
}
|
||||
|
||||
/*!
|
||||
\brief program option bytes DATA
|
||||
\param[in] data: the byte to be programmed
|
||||
\param[out] none
|
||||
\retval state of FMC
|
||||
\arg FMC_READY: the operation has been completed
|
||||
\arg FMC_PGERR: program error
|
||||
\arg FMC_PGAERR: program alignment error
|
||||
\arg FMC_WPERR: erase/program protection error
|
||||
\arg FMC_TOERR: timeout error
|
||||
\arg FMC_OB_HSPC: high security protection
|
||||
*/
|
||||
fmc_state_enum ob_data_program(uint16_t ob_data)
|
||||
{
|
||||
uint32_t temp_spc;
|
||||
uint8_t i;
|
||||
uint32_t op_byte[4];
|
||||
|
||||
fmc_state_enum fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
|
||||
|
||||
temp_spc = OB_SPC_USER;
|
||||
|
||||
/* check the option bytes security protection value */
|
||||
if((RESET != ob_security_protection_flag_get()) && (FMC_HSPC == (temp_spc & LOW_8BITS_MASK))){
|
||||
fmc_state = FMC_OB_HSPC;
|
||||
}
|
||||
|
||||
for(i = 0U; i < 4U; i++){
|
||||
op_byte[i] = OP_BYTE(i);
|
||||
}
|
||||
op_byte[1] = (uint32_t)((ob_data & LOW_8BITS_MASK) | ((ob_data & HIGH_8BITS_MASK) << 8));
|
||||
|
||||
if(FMC_READY == fmc_state){
|
||||
/* start erase the option bytes */
|
||||
FMC_CTL |= FMC_CTL_OBER;
|
||||
FMC_CTL |= FMC_CTL_START;
|
||||
|
||||
/* wait for the FMC ready */
|
||||
fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
|
||||
|
||||
if(FMC_READY == fmc_state){
|
||||
/* reset the OBER bit and enable the option bytes programming */
|
||||
FMC_CTL &= ~FMC_CTL_OBER;
|
||||
FMC_CTL |= FMC_CTL_OBPG;
|
||||
|
||||
for(i = 0U; i < 4U; i++){
|
||||
OP_BYTE(i) = op_byte[i];
|
||||
/* wait for the FMC ready */
|
||||
fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
|
||||
if(FMC_READY != fmc_state){
|
||||
break;
|
||||
}
|
||||
}
|
||||
/* reset the OBPG bit */
|
||||
FMC_CTL &= ~FMC_CTL_OBPG;
|
||||
}else{
|
||||
/* reset the OBER bit */
|
||||
FMC_CTL &= ~FMC_CTL_OBER;
|
||||
}
|
||||
}
|
||||
|
||||
/* return the FMC state */
|
||||
return fmc_state;
|
||||
}
|
||||
|
||||
/*!
|
||||
\brief get the value of option bytes USER
|
||||
\param[in] none
|
||||
\param[out] none
|
||||
\retval the option bytes USER value
|
||||
*/
|
||||
uint8_t ob_user_get(void)
|
||||
{
|
||||
/* return the FMC user option bytes value */
|
||||
return (uint8_t)(FMC_OBSTAT >> FMC_OBSTAT_USER_OFFSET);
|
||||
}
|
||||
|
||||
/*!
|
||||
\brief get the value of option bytes DATA
|
||||
\param[in] none
|
||||
\param[out] none
|
||||
\retval the option bytes DATA value
|
||||
*/
|
||||
uint16_t ob_data_get(void)
|
||||
{
|
||||
return (uint16_t)(FMC_OBSTAT >> FMC_OBSTAT_DATA_OFFSET);
|
||||
}
|
||||
|
||||
/*!
|
||||
\brief get the value of option bytes write protection
|
||||
\param[in] none
|
||||
\param[out] none
|
||||
\retval the write protection option bytes value
|
||||
*/
|
||||
uint32_t ob_write_protection_get(void)
|
||||
{
|
||||
/* return the FMC write protection option bytes value */
|
||||
return FMC_WP;
|
||||
}
|
||||
|
||||
/*!
|
||||
\brief get the FMC option bytes security protection state
|
||||
\param[in] none
|
||||
\param[out] none
|
||||
\retval FlagStatus: SET or RESET
|
||||
*/
|
||||
FlagStatus ob_security_protection_flag_get(void)
|
||||
{
|
||||
FlagStatus spc_state = RESET;
|
||||
|
||||
if(RESET != (FMC_OBSTAT & FMC_OBSTAT_SPC)){
|
||||
spc_state = SET;
|
||||
}else{
|
||||
spc_state = RESET;
|
||||
}
|
||||
return spc_state;
|
||||
}
|
||||
|
||||
/*!
|
||||
\brief get FMC flag status
|
||||
\param[in] flag: FMC flag
|
||||
only one parameter can be selected which is shown as below:
|
||||
\arg FMC_FLAG_BUSY: FMC busy flag
|
||||
\arg FMC_FLAG_PGERR: FMC program error flag
|
||||
\arg FMC_FLAG_PGAERR: FMC program alignment error flag
|
||||
\arg FMC_FLAG_WPERR: FMC erase/program protection error flag
|
||||
\arg FMC_FLAG_END: FMC end of operation flag
|
||||
\param[out] none
|
||||
\retval FlagStatus: SET or RESET
|
||||
*/
|
||||
FlagStatus fmc_flag_get(uint32_t flag)
|
||||
{
|
||||
FlagStatus status = RESET;
|
||||
|
||||
if(FMC_STAT & flag){
|
||||
status = SET;
|
||||
}
|
||||
/* return the state of corresponding FMC flag */
|
||||
return status;
|
||||
}
|
||||
|
||||
/*!
|
||||
\brief clear the FMC flag
|
||||
\param[in] flag: FMC flag
|
||||
only one parameter can be selected which is shown as below:
|
||||
\arg FMC_FLAG_PGERR: FMC program error flag
|
||||
\arg FMC_FLAG_PGAERR: FMC program alignment error flag
|
||||
\arg FMC_FLAG_WPERR: FMC erase/program protection error flag
|
||||
\arg FMC_FLAG_END: FMC end of operation flag
|
||||
\param[out] none
|
||||
\retval none
|
||||
*/
|
||||
void fmc_flag_clear(uint32_t flag)
|
||||
{
|
||||
/* clear the flags */
|
||||
FMC_STAT = flag;
|
||||
}
|
||||
|
||||
/*!
|
||||
\brief enable FMC interrupt
|
||||
\param[in] interrupt: the FMC interrupt
|
||||
only one parameter can be selected which is shown as below:
|
||||
\arg FMC_INT_END: FMC end of operation interrupt
|
||||
\arg FMC_INT_ERR: FMC error interrupt
|
||||
\param[out] none
|
||||
\retval none
|
||||
*/
|
||||
void fmc_interrupt_enable(uint32_t interrupt)
|
||||
{
|
||||
FMC_CTL |= interrupt;
|
||||
}
|
||||
|
||||
/*!
|
||||
\brief disable FMC interrupt
|
||||
\param[in] interrupt: the FMC interrupt
|
||||
only one parameter can be selected which is shown as below:
|
||||
\arg FMC_INT_END: FMC end of operation interrupt
|
||||
\arg FMC_INT_ERR: FMC error interrupt
|
||||
\param[out] none
|
||||
\retval none
|
||||
*/
|
||||
void fmc_interrupt_disable(uint32_t interrupt)
|
||||
{
|
||||
FMC_CTL &= ~(uint32_t)interrupt;
|
||||
}
|
||||
|
||||
/*!
|
||||
\brief get FMC interrupt flag
|
||||
\param[in] flag: FMC interrupt flag
|
||||
only one parameter can be selected which is shown as below:
|
||||
\arg FMC_INT_FLAG_PGERR: FMC operation error interrupt flag
|
||||
\arg FMC_INT_FLAG_PGAERR: FMC program alignment error interrupt flag
|
||||
\arg FMC_INT_FLAG_WPERR: FMC erase/program protection error interrupt flag
|
||||
\arg FMC_INT_FLAG_END: FMC end of operation interrupt flag
|
||||
\param[out] none
|
||||
\retval FlagStatus: SET or RESET
|
||||
*/
|
||||
FlagStatus fmc_interrupt_flag_get(uint32_t flag)
|
||||
{
|
||||
FlagStatus status = RESET;
|
||||
|
||||
if(FMC_STAT & flag){
|
||||
status = SET;
|
||||
}
|
||||
/* return the state of corresponding FMC flag */
|
||||
return status;
|
||||
}
|
||||
|
||||
/*!
|
||||
\brief clear FMC interrupt flag
|
||||
\param[in] flag: FMC interrupt flag
|
||||
one or more parameters can be selected which is shown as below:
|
||||
\arg FMC_INT_FLAG_PGERR: FMC operation error interrupt flag
|
||||
\arg FMC_INT_FLAG_PGAERR: FMC program alignment error interrupt flag
|
||||
\arg FMC_INT_FLAG_WPERR: FMC erase/program protection error interrupt flag
|
||||
\arg FMC_INT_FLAG_END: FMC end of operation interrupt flag
|
||||
\param[out] none
|
||||
\retval none
|
||||
*/
|
||||
void fmc_interrupt_flag_clear(uint32_t flag)
|
||||
{
|
||||
/* clear the flag */
|
||||
FMC_STAT = flag;
|
||||
}
|
||||
|
||||
/*!
|
||||
\brief get the FMC state
|
||||
\param[in] none
|
||||
\param[out] none
|
||||
\retval state of FMC, refer to fmc_state_enum
|
||||
*/
|
||||
static fmc_state_enum fmc_state_get(void)
|
||||
{
|
||||
fmc_state_enum fmc_state = FMC_READY;
|
||||
|
||||
if((uint32_t)0x00U != (FMC_STAT & FMC_STAT_BUSY)){
|
||||
fmc_state = FMC_BUSY;
|
||||
}else{
|
||||
if((uint32_t)0x00U != (FMC_STAT & FMC_STAT_WPERR)){
|
||||
fmc_state = FMC_WPERR;
|
||||
}else{
|
||||
if((uint32_t)0x00U != (FMC_STAT & (FMC_STAT_PGERR))){
|
||||
fmc_state = FMC_PGERR;
|
||||
}else{
|
||||
if((uint32_t)0x00U != (FMC_STAT & (FMC_STAT_PGAERR))){
|
||||
fmc_state = FMC_PGAERR;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
/* return the FMC state */
|
||||
return fmc_state;
|
||||
}
|
||||
|
||||
/*!
|
||||
\brief check whether FMC is ready or not
|
||||
\param[in] timeout: timeout count
|
||||
\param[out] none
|
||||
\retval state of FMC, refer to fmc_state_enum
|
||||
*/
|
||||
static fmc_state_enum fmc_ready_wait(uint32_t timeout)
|
||||
{
|
||||
fmc_state_enum fmc_state = FMC_BUSY;
|
||||
|
||||
/* wait for FMC ready */
|
||||
do{
|
||||
/* get FMC state */
|
||||
fmc_state = fmc_state_get();
|
||||
timeout--;
|
||||
}while((FMC_BUSY == fmc_state) && (0x00U != timeout));
|
||||
|
||||
if(FMC_BUSY == fmc_state){
|
||||
fmc_state = FMC_TOERR;
|
||||
}
|
||||
/* return the FMC state */
|
||||
return fmc_state;
|
||||
}
|
||||
Reference in New Issue
Block a user