239 lines
8.1 KiB
Python
239 lines
8.1 KiB
Python
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#!/usr/bin/env python3
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"""test_pram_batch_sim.py - 主机侧仿真:验证 pramRead/pramWrite 批量化(1.6.0)
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与旧实现(逐 DWORD 轮询)逐字节等价。
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模型依据 LAN9252 DS00001909A §12.11.3/12.11.4:
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- PRAM FIFO 16 deep x 32bit;AVAIL_CNT(CMD bits12:8)=可连续读/写的 DWORD 数
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- 读引擎按 DWORD 对齐向下取源:第 i 个 FIFO DWORD = 源地址 aligned(addr)+4i 起 4 字节;
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线性有效窗口 = [0, len),即 DWORD i 的字节 k 有效 iff 0 <= 4i+k-lead < len
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- 写引擎按同一线性窗口落盘,主站推满一个 DWORD 计一次
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- 引擎以有限速率搬运(rate),主站 respect AVAIL_CNT 就不会溢 FIFO/读空洞
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对全部 (addr 对齐 x len 1..70/96/384/640 x 引擎节奏) 断言:
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新旧算法产出逐字节一致,且主站从不超出 AVAIL_CNT(引擎内 assert)。
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"""
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import random
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FIFO_DW = 16 # FIFO 深度 16 DWORD
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WINDOW_DW = 8 # 别名窗口一程 8 DWORD (0x00-0x1C / 0x20-0x3C)
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PRAM_BASE = 0x1000
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PRAM_SIZE = 0x1000
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def byte_valid(i, k, lead, ln):
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"""DWORD i 的字节 k 是否落在线性有效窗口 [0, ln) 内。"""
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return 0 <= 4 * i + k - lead < ln
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class ReadEngine:
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def __init__(self, mem, addr, ln, rate):
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self.mem = mem
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self.lead = addr & 3
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self.ln = ln
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self.rate = max(1, rate)
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self.total_dw = (ln + self.lead + 3) // 4
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self.start = (addr & ~3) - PRAM_BASE # mem 内偏移
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self.pushed = 0
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self.popped = 0
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self.data = []
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def pump(self):
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n = 0
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while (self.pushed - self.popped < FIFO_DW and self.pushed < self.total_dw
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and n < self.rate):
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i = self.pushed
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dw = bytearray(4)
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for k in range(4):
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if byte_valid(i, k, self.lead, self.ln):
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dw[k] = self.mem[self.start + 4 * i + k]
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self.data.append(bytes(dw))
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self.pushed += 1
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n += 1
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return n
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def avail_cnt(self):
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return self.pushed - self.popped
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def pop(self):
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assert self.popped < self.pushed, "主站弹出超出 AVAIL_CNT!"
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dw = self.data[self.popped]
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self.popped += 1
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return dw
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def pram_read_old(eng, addr, ln, poll_budget=2000):
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out = bytearray()
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done = 0
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polls = 0
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while done < ln:
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while eng.avail_cnt() == 0:
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polls += 1
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if polls > poll_budget:
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return bytes(out), False
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eng.pump()
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dw = eng.pop()
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lead = (addr & 3) if done == 0 else 0
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take = min(ln - done, 4 - lead)
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out += dw[lead:lead + take]
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done += take
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eng.pump()
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return bytes(out), True
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def pram_read_new(eng, addr, ln, poll_budget=2000):
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out = bytearray()
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done = 0
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polls = 0
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while done < ln:
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while eng.avail_cnt() == 0:
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polls += 1
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if polls > poll_budget:
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return bytes(out), False
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eng.pump()
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batch = eng.avail_cnt()
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if batch == 0 or batch > WINDOW_DW:
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batch = 1
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lead0 = (addr & 3) if done == 0 else 0
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need_dw = (ln - done + lead0 + 3) // 4
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batch = min(batch, need_dw)
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for _ in range(batch):
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dw = eng.pop()
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lead = (addr & 3) if done == 0 else 0
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take = min(ln - done, 4 - lead)
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out += dw[lead:lead + take]
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done += take
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eng.pump()
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return bytes(out), True
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class WriteEngine:
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def __init__(self, addr, ln, rate):
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self.lead = addr & 3
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self.ln = ln
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self.rate = max(1, rate)
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self.total_dw = (ln + self.lead + 3) // 4
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self.start = (addr & ~3) - PRAM_BASE
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self.fifo = []
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self.consumed_dw = 0
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self.mem = bytearray(PRAM_SIZE)
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def pump(self):
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n = 0
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while self.fifo and n < self.rate:
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dw = self.fifo.pop(0)
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i = self.consumed_dw
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for k in range(4):
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if byte_valid(i, k, self.lead, self.ln):
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self.mem[self.start + 4 * i + k] = dw[k]
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self.consumed_dw += 1
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n += 1
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return n
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def space_cnt(self):
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return FIFO_DW - len(self.fifo)
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def push(self, dw):
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assert len(self.fifo) < FIFO_DW, "主站写溢出 FIFO!"
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self.fifo.append(bytes(dw))
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def _write_common(eng, addr, buf, poll_budget, batched):
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ln = len(buf)
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done = 0
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polls = 0
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while done < ln:
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while eng.space_cnt() == 0:
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polls += 1
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if polls > poll_budget:
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return False
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eng.pump()
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n_iter = 1
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if batched:
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batch = eng.space_cnt()
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if batch == 0 or batch > WINDOW_DW:
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batch = 1
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lead0 = (addr & 3) if done == 0 else 0
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need_dw = (ln - done + lead0 + 3) // 4
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n_iter = min(batch, need_dw)
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for _ in range(n_iter):
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lead = (addr & 3) if done == 0 else 0
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take = min(ln - done, 4 - lead)
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dw = bytearray(4)
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for i in range(take):
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dw[lead + i] = buf[done + i]
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eng.push(dw)
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done += take
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eng.pump()
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budget = poll_budget
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while eng.consumed_dw < eng.total_dw and budget:
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eng.pump()
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budget -= 1
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return eng.consumed_dw == eng.total_dw
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def pram_write_old(eng, addr, buf, poll_budget=2000):
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return _write_common(eng, addr, buf, poll_budget, batched=False)
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def pram_write_new(eng, addr, buf, poll_budget=2000):
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return _write_common(eng, addr, buf, poll_budget, batched=True)
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def run():
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random.seed(20260905)
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cases = 0
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lens = list(range(1, 71)) + [96, 384, 640] # 覆盖 SM2(384B)/SM3(640B) 实际长度
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for align in range(4):
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for ln in lens:
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for rate in (1, 3, 16, 64):
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src = bytes(random.randrange(1, 256) for _ in range(ln))
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base = random.randrange(PRAM_SIZE - ln - 8)
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addr = PRAM_BASE + base + align
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mem = bytearray(PRAM_SIZE)
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mem[base + align: base + align + ln] = src
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# 读等价:新旧都须完整取回 src
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e1 = ReadEngine(mem, addr, ln, rate); e1.pump()
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r_old, ok1 = pram_read_old(e1, addr, ln)
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e2 = ReadEngine(mem, addr, ln, rate); e2.pump()
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r_new, ok2 = pram_read_new(e2, addr, ln)
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assert ok1 and ok2, f"read 未完成 align={align} len={ln} rate={rate}"
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assert r_old == src, f"read 旧实现不符 align={align} len={ln} rate={rate}"
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assert r_new == src, f"read 新实现不符 align={align} len={ln} rate={rate}"
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# 写等价:新旧都须把 src 落到同一片 PRAM
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w1 = WriteEngine(addr, ln, rate); w1.pump()
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assert pram_write_old(w1, addr, src), f"write 未完成 {align}/{ln}/{rate}"
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w2 = WriteEngine(addr, ln, rate); w2.pump()
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assert pram_write_new(w2, addr, src), f"write 未完成 {align}/{ln}/{rate}"
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assert bytes(w1.mem[base + align: base + align + ln]) == src, \
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f"write 旧不符 {align}/{ln}/{rate}"
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assert bytes(w2.mem[base + align: base + align + ln]) == src, \
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f"write 新不符 {align}/{ln}/{rate}"
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cases += 1
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print(f"OK: {cases} 组 (对齐x长度x引擎节奏) 新旧算法逐字节等价")
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# 统计新实现的轮询次数收益(代表性场景:SM3 640B DWORD 对齐,引擎速率 16)
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for rate in (1, 3, 16):
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src = bytes(random.randrange(1, 256) for _ in range(640))
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e = ReadEngine(bytearray(PRAM_SIZE), PRAM_BASE, 640, rate); e.pump()
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_, p1 = _count_polls(e, 640)
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print(f" 640B@rate{rate}: 新算法主站外圈轮询 {p1} 次")
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def _count_polls(eng, ln):
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done = 0
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polls = 0
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while done < ln:
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while eng.avail_cnt() == 0:
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polls += 1
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eng.pump()
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batch = min(eng.avail_cnt(), WINDOW_DW)
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lead0 = 0 if done == 0 else 0
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batch = min(batch, (ln - done + lead0 + 3) // 4)
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for _ in range(batch):
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eng.pop()
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done += 4
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return None, polls
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if __name__ == "__main__":
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run()
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