Files
cbb 05069e3057 feat(cproject): 移除CAN DMA相关代码并优化编译配置
- 移除了CAN模块中的DMA相关代码,包括can_dma_init函数、
  DMA中断处理函数以及相关的全局变量和头文件包含

- 更新了项目构建配置,将优化级别从balanced改为size以减小
  固件体积

- 添加了-fno-exceptions和-fno-rtti编译选项以进一步优化代码

- 升级了GD32C10x_DFP包版本至1.5.0

- 调整了OTA跳转逻辑,增加了更安全的中断和外设关闭处理

- 修复了Flash写入时的重复包处理逻辑,增加错误标志清理机制

- 将AES加密算法中的gf_mul函数标记为noinline属性
2026-07-26 23:08:02 +08:00

102 lines
2.9 KiB
C

#ifndef REGIONS_GD32C103CB_H
#define REGIONS_GD32C103CB_H
//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
//------ With VS Code: Open Preview for Configuration Wizard -------------------
// <n> Auto-generated using information from packs
// <i> Device Family Pack (DFP): GigaDevice::GD32C10x_DFP@1.0.1
// <h> ROM Configuration
// =======================
// <h> __ROM0 (is rx memory: IROM1 from DFP)
// <o> Base address <0x0-0xFFFFFFFF:8>
// <i> Defines base address of memory region. Default: 0x08000000
// <i> Contains Startup and Vector Table
#define __ROM0_BASE 0x08000000
// <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
// <i> Defines size of memory region. Default: 0x00020000
#define __ROM0_SIZE 0x00006000
// </h>
// <h> __ROM1 (unused)
// <o> Base address <0x0-0xFFFFFFFF:8>
// <i> Defines base address of memory region.
#define __ROM1_BASE 0x0
// <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
// <i> Defines size of memory region.
#define __ROM1_SIZE 0x0
// </h>
// <h> __ROM2 (unused)
// <o> Base address <0x0-0xFFFFFFFF:8>
// <i> Defines base address of memory region.
#define __ROM2_BASE 0x0
// <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
// <i> Defines size of memory region.
#define __ROM2_SIZE 0x0
// </h>
// <h> __ROM3 (unused)
// <o> Base address <0x0-0xFFFFFFFF:8>
// <i> Defines base address of memory region.
#define __ROM3_BASE 0x0
// <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
// <i> Defines size of memory region.
#define __ROM3_SIZE 0x0
// </h>
// </h>
// <h> RAM Configuration
// =======================
// <h> __RAM0 (is rwx memory: IRAM1 from DFP)
// <o> Base address <0x0-0xFFFFFFFF:8>
// <i> Defines base address of memory region. Default: 0x20000000
// <i> Contains uninitialized RAM, Stack, and Heap
#define __RAM0_BASE 0x20000000
// <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
// <i> Defines size of memory region. Default: 0x00008000
#define __RAM0_SIZE 0x00008000
// </h>
// <h> __RAM1 (unused)
// <o> Base address <0x0-0xFFFFFFFF:8>
// <i> Defines base address of memory region.
#define __RAM1_BASE 0x0
// <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
// <i> Defines size of memory region.
#define __RAM1_SIZE 0x0
// </h>
// <h> __RAM2 (unused)
// <o> Base address <0x0-0xFFFFFFFF:8>
// <i> Defines base address of memory region.
#define __RAM2_BASE 0x0
// <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
// <i> Defines size of memory region.
#define __RAM2_SIZE 0x0
// </h>
// <h> __RAM3 (unused)
// <o> Base address <0x0-0xFFFFFFFF:8>
// <i> Defines base address of memory region.
#define __RAM3_BASE 0x0
// <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
// <i> Defines size of memory region.
#define __RAM3_SIZE 0x0
// </h>
// </h>
// <h> Stack / Heap Configuration
// <o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
// <o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
#define __STACK_SIZE 0x00000200
#define __HEAP_SIZE 0x00000C00
// </h>
#endif /* REGIONS_GD32C103CB_H */