cbb
2f482554f0
- 添加OTA固件升级功能，包括应用程序验证和跳转机制 - 实现CANFD数据传输协议，支持加密和CRC校验 - 优化CAN通信处理，添加调试输出和错误处理 - 更新RTE组件配置，升级csolution版本到2.12.0 - 增加Flash擦除和写入的安全验证机制 - 添加应用程序区域扫描和验证功能 refactor(can): 重构CAN通信模块和OTA数据处理 - 移除未使用的常量定义和辅助函数 - 改进数据解包和加密解密流程 - 添加条件编译调试输出 - 优化Flash操作的安全性和可靠性 chore(build): 更新项目配置和忽略文件 - 添加tmp/和out/目录到.gitignore - 扩展ROM0_SIZE从0x0020000到0x08005000 - 添加bin输出格式支持
102 lines
2.9 KiB
C
102 lines
2.9 KiB
C
#ifndef REGIONS_GD32C103CB_H
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#define REGIONS_GD32C103CB_H
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//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
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//------ With VS Code: Open Preview for Configuration Wizard -------------------
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// <n> Auto-generated using information from packs
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// <i> Device Family Pack (DFP): GigaDevice::GD32C10x_DFP@1.0.1
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// <h> ROM Configuration
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// =======================
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// <h> __ROM0 (is rx memory: IROM1 from DFP)
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// <o> Base address <0x0-0xFFFFFFFF:8>
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// <i> Defines base address of memory region. Default: 0x08000000
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// <i> Contains Startup and Vector Table
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#define __ROM0_BASE 0x08000000
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// <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
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// <i> Defines size of memory region. Default: 0x00020000
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#define __ROM0_SIZE 0x08005000
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// </h>
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// <h> __ROM1 (unused)
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// <o> Base address <0x0-0xFFFFFFFF:8>
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// <i> Defines base address of memory region.
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#define __ROM1_BASE 0x0
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// <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
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// <i> Defines size of memory region.
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#define __ROM1_SIZE 0x0
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// </h>
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// <h> __ROM2 (unused)
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// <o> Base address <0x0-0xFFFFFFFF:8>
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// <i> Defines base address of memory region.
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#define __ROM2_BASE 0x0
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// <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
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// <i> Defines size of memory region.
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#define __ROM2_SIZE 0x0
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// </h>
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// <h> __ROM3 (unused)
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// <o> Base address <0x0-0xFFFFFFFF:8>
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// <i> Defines base address of memory region.
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#define __ROM3_BASE 0x0
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// <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
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// <i> Defines size of memory region.
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#define __ROM3_SIZE 0x0
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// </h>
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// </h>
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// <h> RAM Configuration
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// =======================
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// <h> __RAM0 (is rwx memory: IRAM1 from DFP)
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// <o> Base address <0x0-0xFFFFFFFF:8>
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// <i> Defines base address of memory region. Default: 0x20000000
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// <i> Contains uninitialized RAM, Stack, and Heap
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#define __RAM0_BASE 0x20000000
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// <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
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// <i> Defines size of memory region. Default: 0x00008000
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#define __RAM0_SIZE 0x00008000
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// </h>
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// <h> __RAM1 (unused)
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// <o> Base address <0x0-0xFFFFFFFF:8>
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// <i> Defines base address of memory region.
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#define __RAM1_BASE 0x0
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// <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
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// <i> Defines size of memory region.
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#define __RAM1_SIZE 0x0
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// </h>
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// <h> __RAM2 (unused)
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// <o> Base address <0x0-0xFFFFFFFF:8>
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// <i> Defines base address of memory region.
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#define __RAM2_BASE 0x0
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// <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
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// <i> Defines size of memory region.
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#define __RAM2_SIZE 0x0
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// </h>
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// <h> __RAM3 (unused)
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// <o> Base address <0x0-0xFFFFFFFF:8>
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// <i> Defines base address of memory region.
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#define __RAM3_BASE 0x0
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// <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
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// <i> Defines size of memory region.
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#define __RAM3_SIZE 0x0
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// </h>
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// </h>
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// <h> Stack / Heap Configuration
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// <o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
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// <o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
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#define __STACK_SIZE 0x00000200
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#define __HEAP_SIZE 0x00000C00
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// </h>
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#endif /* REGIONS_GD32C103CB_H */
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