From 94d5fda0b65b0027d8c49290b45fb63e9a503152 Mon Sep 17 00:00:00 2001 From: cbb <2625274797@qq.com> Date: Wed, 6 May 2026 00:14:16 +0800 Subject: [PATCH] =?UTF-8?q?feat:=20=E6=9B=B4=E6=96=B0CMSIS=E5=92=8CGD32C10?= =?UTF-8?q?x=5FDFP=E5=8C=85=E7=89=88=E6=9C=AC=E5=B9=B6=E4=BC=98=E5=8C=96?= =?UTF-8?q?=E4=BB=A3=E7=A0=81?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit - 升级ARM::CMSIS从4.5.0到6.1.0版本 - 添加ARM::CMSIS-DSP@1.16.2依赖包 - 升级GigaDevice::GD32C10x_DFP从1.0.1到1.5.0版本 - 移除FOC.cpp中未使用的systick.h头文件 - 移除pid.cpp中未使用的头文件 - 更新GD32C10x固件库至V1.7.0版本(2026-01-30) - 修复ADC驱动中的无符号整数运算问题 - 优化BKP、CAN、CTC等外设驱动中的FlagStatus返回逻辑 - 改进CAN驱动的消息发送和传输停止函数实现 - 修复CRC、DMA、FMC等驱动中的数据类型和变量声明问题 - 清理和修正各驱动文件中的文档注释 --- Robot_V2.cbuild-pack.yml | 7 +- Robot_V2/Algorithm/FOC.cpp | 1 - Robot_V2/Algorithm/pid.cpp | 1 - Robot_V2/RTE/Device/GD32C103CB/gd32c10x_adc.c | 11 +- Robot_V2/RTE/Device/GD32C103CB/gd32c10x_bkp.c | 18 +- Robot_V2/RTE/Device/GD32C103CB/gd32c10x_can.c | 236 ++++++++++-------- Robot_V2/RTE/Device/GD32C103CB/gd32c10x_crc.c | 8 +- Robot_V2/RTE/Device/GD32C103CB/gd32c10x_ctc.c | 28 ++- Robot_V2/RTE/Device/GD32C103CB/gd32c10x_dac.c | 5 +- Robot_V2/RTE/Device/GD32C103CB/gd32c10x_dbg.c | 4 +- Robot_V2/RTE/Device/GD32C103CB/gd32c10x_dma.c | 10 +- .../RTE/Device/GD32C103CB/gd32c10x_exmc.c | 4 +- .../RTE/Device/GD32C103CB/gd32c10x_exti.c | 18 +- Robot_V2/RTE/Device/GD32C103CB/gd32c10x_fmc.c | 23 +- .../RTE/Device/GD32C103CB/gd32c10x_fwdgt.c | 95 ++++--- .../RTE/Device/GD32C103CB/gd32c10x_gpio.c | 22 +- Robot_V2/RTE/Device/GD32C103CB/gd32c10x_i2c.c | 16 +- .../RTE/Device/GD32C103CB/gd32c10x_misc.c | 42 ++-- Robot_V2/RTE/Device/GD32C103CB/gd32c10x_pmu.c | 11 +- Robot_V2/RTE/Device/GD32C103CB/gd32c10x_rcu.c | 22 +- Robot_V2/RTE/Device/GD32C103CB/gd32c10x_rtc.c | 18 +- Robot_V2/RTE/Device/GD32C103CB/gd32c10x_spi.c | 47 ++-- .../RTE/Device/GD32C103CB/gd32c10x_timer.c | 16 +- .../RTE/Device/GD32C103CB/gd32c10x_usart.c | 17 +- .../RTE/Device/GD32C103CB/gd32c10x_wwdgt.c | 10 +- .../RTE/_Release_GD32C103CB/RTE_Components.h | 38 +-- Robot_V2/Robot_V2.cproject.yml | 3 +- Robot_V2/device/ang_sensor.cpp | 1 - Robot_V2/sys/health.cpp | 1 - Robot_V2/sys/systick.cpp | 3 - 30 files changed, 409 insertions(+), 327 deletions(-) diff --git a/Robot_V2.cbuild-pack.yml b/Robot_V2.cbuild-pack.yml index d3c7b80..8468dd6 100644 --- a/Robot_V2.cbuild-pack.yml +++ b/Robot_V2.cbuild-pack.yml @@ -1,8 +1,11 @@ cbuild-pack: resolved-packs: - - resolved-pack: ARM::CMSIS@4.5.0 + - resolved-pack: ARM::CMSIS@6.1.0 selected-by-pack: - ARM::CMSIS - - resolved-pack: GigaDevice::GD32C10x_DFP@1.0.1 + - resolved-pack: ARM::CMSIS-DSP@1.16.2 + selected-by-pack: + - ARM::CMSIS-DSP + - resolved-pack: GigaDevice::GD32C10x_DFP@1.5.0 selected-by-pack: - GigaDevice::GD32C10x_DFP diff --git a/Robot_V2/Algorithm/FOC.cpp b/Robot_V2/Algorithm/FOC.cpp index 2c47229..54f02b2 100644 --- a/Robot_V2/Algorithm/FOC.cpp +++ b/Robot_V2/Algorithm/FOC.cpp @@ -7,7 +7,6 @@ #include "config.h" #include "motor.h" #include "pid.h" -#include "systick.h" #include #include #include diff --git a/Robot_V2/Algorithm/pid.cpp b/Robot_V2/Algorithm/pid.cpp index 9c28762..5423463 100644 --- a/Robot_V2/Algorithm/pid.cpp +++ b/Robot_V2/Algorithm/pid.cpp @@ -3,7 +3,6 @@ ((amt) < (low) ? (low) : ((amt) > (high) ? (high) : (amt))) #include "Can.h" #include "config.h" -#include #include extern CAN_transmiter CAN0_transmiter; diff --git a/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_adc.c b/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_adc.c index 638fd3a..0fbc129 100644 --- a/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_adc.c +++ b/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_adc.c @@ -2,11 +2,11 @@ \file gd32c10x_adc.c \brief ADC driver - \version 2025-08-07, V1.6.0, firmware for GD32C10x + \version 2026-01-30, V1.7.0, firmware for GD32C10x */ /* - Copyright (c) 2025, GigaDevice Semiconductor Inc. + Copyright (c) 2026, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -508,8 +508,8 @@ void adc_inserted_channel_config(uint32_t adc_periph , uint8_t rank , uint8_t ad inserted_length = (uint8_t)GET_BITS(ADC_ISQ(adc_periph) , 20U , 21U); /* the channel number is written to these bits to select a channel as the nth conversion in the inserted channel group */ isq = ADC_ISQ(adc_periph); - isq &= ~((uint32_t)(ADC_ISQ_ISQN << (5U * ((3 + rank) - inserted_length)))); - isq |= ((uint32_t)adc_channel << (5U * ((3 + rank) - inserted_length))); + isq &= ~((uint32_t)(ADC_ISQ_ISQN << (5U * ((3U + rank) - inserted_length)))); + isq |= ((uint32_t)adc_channel << (5U * ((3U + rank) - inserted_length))); ADC_ISQ(adc_periph) = isq; /* ADC sampling time config */ @@ -669,7 +669,6 @@ void adc_software_trigger_enable(uint32_t adc_periph , uint8_t adc_channel_group /*! \brief read ADC regular group data register \param[in] adc_periph: ADCx,x=0,1 - \param[in] none \param[out] none \retval the conversion value */ @@ -848,7 +847,6 @@ void adc_flag_clear(uint32_t adc_periph , uint32_t adc_flag) /*! \brief get the bit state of ADCx software start conversion \param[in] adc_periph: ADCx, x=0,1, only one among these parameters can be selected - \param[in] none \param[out] none \retval FlagStatus: SET or RESET */ @@ -864,7 +862,6 @@ FlagStatus adc_regular_software_startconv_flag_get(uint32_t adc_periph) /*! \brief get the bit state of ADCx software inserted channel start conversion \param[in] adc_periph: ADCx, x=0,1 only one among these parameters can be selected - \param[in] none \param[out] none \retval FlagStatus: SET or RESET */ diff --git a/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_bkp.c b/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_bkp.c index 3832c3d..79dda7e 100644 --- a/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_bkp.c +++ b/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_bkp.c @@ -2,11 +2,11 @@ \file gd32c10x_bkp.c \brief BKP driver - \version 2025-08-07, V1.6.0, firmware for GD32C10x + \version 2026-01-30, V1.7.0, firmware for GD32C10x */ /* - Copyright (c) 2025, GigaDevice Semiconductor Inc. + Copyright (c) 2026, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -287,11 +287,14 @@ void bkp_interrupt_disable(void) */ FlagStatus bkp_flag_get(void) { + FlagStatus ret; + if(RESET != (BKP_TPCS & BKP_FLAG_TAMPER)){ - return SET; + ret = SET; }else{ - return RESET; + ret = RESET; } + return ret; } /*! @@ -313,11 +316,14 @@ void bkp_flag_clear(void) */ FlagStatus bkp_interrupt_flag_get(void) { + FlagStatus ret; + if(RESET != (BKP_TPCS & BKP_INT_FLAG_TAMPER)){ - return SET; + ret = SET; }else{ - return RESET; + ret = RESET; } + return ret; } /*! diff --git a/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_can.c b/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_can.c index ca75355..85c8bcd 100644 --- a/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_can.c +++ b/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_can.c @@ -2,11 +2,11 @@ \file gd32c10x_can.c \brief CAN driver - \version 2025-08-07, V1.6.0, firmware for GD32C10x + \version 2026-01-30, V1.7.0, firmware for GD32C10x */ /* - Copyright (c) 2025, GigaDevice Semiconductor Inc. + Copyright (c) 2026, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -33,7 +33,6 @@ OF SUCH DAMAGE. */ #include "gd32c10x_can.h" -#include "stdio.h" #include #define CAN_ERROR_HANDLE(s) do{}while(1) @@ -301,10 +300,11 @@ ErrStatus can_fd_init(uint32_t can_periph, can_fdframe_struct *can_fdframe_init) { uint32_t timeout = CAN_TIMEOUT; uint32_t tempreg = 0U; + ErrStatus reval = SUCCESS; /* check null pointer */ if(0 == can_fdframe_init) { - return ERROR; + reval = ERROR; } /* disable sleep mode */ CAN_CTL(can_periph) &= ~CAN_CTL_SLPWMOD; @@ -316,7 +316,7 @@ ErrStatus can_fd_init(uint32_t can_periph, can_fdframe_struct *can_fdframe_init) } /* check initialize working success */ if(CAN_STAT_IWS != (CAN_STAT(can_periph) & CAN_STAT_IWS)) { - return ERROR; + reval = ERROR; } else { /* set the data bit timing register */ CAN_DBT(can_periph) = (BT_DSJW((uint32_t)can_fdframe_init->data_resync_jump_width) | \ @@ -342,7 +342,7 @@ ErrStatus can_fd_init(uint32_t can_periph, can_fdframe_struct *can_fdframe_init) CAN_FDTDC(can_periph) = (FDTDC_TDCF(can_fdframe_init->p_delay_compensation->tdc_filter) | FDTDC_TDCO( can_fdframe_init->p_delay_compensation->tdc_offset)); } else { - return ERROR; + reval = ERROR; } } else { /* Transmitter delay compensation mode is disabled */ @@ -366,11 +366,11 @@ ErrStatus can_fd_init(uint32_t can_periph, can_fdframe_struct *can_fdframe_init) } /* check exit initialize mode */ if(0U == timeout) { - return ERROR; + reval = ERROR; } } - return SUCCESS; + return reval; } /*! @@ -747,90 +747,89 @@ uint8_t can_message_transmit(uint32_t can_periph, can_trasnmit_message_struct *t } else { mailbox_number = CAN_NOMAILBOX; } - /* return no mailbox empty */ - if(CAN_NOMAILBOX == mailbox_number) { - return CAN_NOMAILBOX; - } + + /* got one empty mailbox */ + if(CAN_NOMAILBOX != mailbox_number) { - CAN_TMI(can_periph, mailbox_number) &= CAN_TMI_TEN; - if(CAN_FF_STANDARD == transmit_message->tx_ff) { - /* set transmit mailbox standard identifier */ - CAN_TMI(can_periph, mailbox_number) |= (uint32_t)(TMI_SFID(transmit_message->tx_sfid) | \ - transmit_message->tx_ft); - } else { - /* set transmit mailbox extended identifier */ - CAN_TMI(can_periph, mailbox_number) |= (uint32_t)(TMI_EFID(transmit_message->tx_efid) | \ - transmit_message->tx_ff | \ - transmit_message->tx_ft); - } - - if(CAN_FDF_CLASSIC == transmit_message->fd_flag) { - /* set the data length */ - CAN_TMP(can_periph, mailbox_number) &= ~(CAN_TMP_DLENC | CAN_TMP_ESI | CAN_TMP_BRS | CAN_TMP_FDF); - /* Classic CAN frame data length does not exceed 8 */ - if (transmit_message->tx_dlen > 8U) { - transmit_message->tx_dlen = 8U; + CAN_TMI(can_periph, mailbox_number) &= CAN_TMI_TEN; + if(CAN_FF_STANDARD == transmit_message->tx_ff) { + /* set transmit mailbox standard identifier */ + CAN_TMI(can_periph, mailbox_number) |= (uint32_t)(TMI_SFID(transmit_message->tx_sfid) | \ + transmit_message->tx_ft); + } else { + /* set transmit mailbox extended identifier */ + CAN_TMI(can_periph, mailbox_number) |= (uint32_t)(TMI_EFID(transmit_message->tx_efid) | \ + transmit_message->tx_ff | \ + transmit_message->tx_ft); } - CAN_TMP(can_periph, mailbox_number) |= transmit_message->tx_dlen; - /* set the data */ - CAN_TMDATA0(can_periph, mailbox_number) = TMDATA0_DB3(transmit_message->tx_data[3]) | \ - TMDATA0_DB2(transmit_message->tx_data[2]) | \ - TMDATA0_DB1(transmit_message->tx_data[1]) | \ - TMDATA0_DB0(transmit_message->tx_data[0]); - CAN_TMDATA1(can_periph, mailbox_number) = TMDATA1_DB7(transmit_message->tx_data[7]) | \ - TMDATA1_DB6(transmit_message->tx_data[6]) | \ - TMDATA1_DB5(transmit_message->tx_data[5]) | \ - TMDATA1_DB4(transmit_message->tx_data[4]); - } else { - canfd_en = CAN_FDCTL(can_periph) & CAN_FDCTL_FDEN; - /* check FD function has been enabled */ - if(canfd_en) { - if(transmit_message->tx_dlen <= 8U) { - /* set the data length */ - reg_temp |= transmit_message->tx_dlen; - } else { - /* data length greater than 8 */ - for(i = 0U; i < 7U; i++) { - if(transmit_message->tx_dlen == g_can_fdlength_table[i]) { - hit = 1U; - break; + + if(CAN_FDF_CLASSIC == transmit_message->fd_flag) { + /* set the data length */ + CAN_TMP(can_periph, mailbox_number) &= ~(CAN_TMP_DLENC | CAN_TMP_ESI | CAN_TMP_BRS | CAN_TMP_FDF); + /* Classic CAN frame data length does not exceed 8 */ + if (transmit_message->tx_dlen > 8U) { + transmit_message->tx_dlen = 8U; + } + CAN_TMP(can_periph, mailbox_number) |= transmit_message->tx_dlen; + /* set the data */ + CAN_TMDATA0(can_periph, mailbox_number) = TMDATA0_DB3(transmit_message->tx_data[3]) | \ + TMDATA0_DB2(transmit_message->tx_data[2]) | \ + TMDATA0_DB1(transmit_message->tx_data[1]) | \ + TMDATA0_DB0(transmit_message->tx_data[0]); + CAN_TMDATA1(can_periph, mailbox_number) = TMDATA1_DB7(transmit_message->tx_data[7]) | \ + TMDATA1_DB6(transmit_message->tx_data[6]) | \ + TMDATA1_DB5(transmit_message->tx_data[5]) | \ + TMDATA1_DB4(transmit_message->tx_data[4]); + } else { + canfd_en = CAN_FDCTL(can_periph) & CAN_FDCTL_FDEN; + /* check FD function has been enabled */ + if(canfd_en) { + if(transmit_message->tx_dlen <= 8U) { + /* set the data length */ + reg_temp |= transmit_message->tx_dlen; + } else { + /* data length greater than 8 */ + for(i = 0U; i < 7U; i++) { + if(transmit_message->tx_dlen == g_can_fdlength_table[i]) { + hit = 1U; + break; + } + } + /* data length is valid */ + if(1U == hit) { + reg_temp |= 9U + i; + } else { + CAN_ERROR_HANDLE("dlen is invalid \r\n"); } } - /* data length is valid */ - if(1U == hit) { - reg_temp |= 9U + i; - } else { - CAN_ERROR_HANDLE("dlen is invalid \r\n"); + reg_temp |= (((uint32_t)transmit_message->fd_brs << 5U) | ((uint32_t)transmit_message->fd_esi << 4U) | ((uint32_t)transmit_message->fd_flag << 7U)); + CAN_TMP(can_periph, mailbox_number) = reg_temp; + + /* set the data */ + i = transmit_message->tx_dlen / 4U; + + /* data length is 5-7 need send 2 word */ + if((1U == i) && (4U != transmit_message->tx_dlen)) { + i++; } - } - reg_temp |= (((uint32_t)transmit_message->fd_brs << 5U) | ((uint32_t)transmit_message->fd_esi << 4U) | ((uint32_t)transmit_message->fd_flag << 7U)); - CAN_TMP(can_periph, mailbox_number) = reg_temp; - - /* set the data */ - i = transmit_message->tx_dlen / 4U; - - /* data length is 5-7 need send 2 word */ - if((1U == i) && (4U != transmit_message->tx_dlen)) { - i++; - } - p_temp = (uint32_t)transmit_message->tx_data; - if((0U == i)) { - CAN_TMDATA0(can_periph, mailbox_number) = *(uint32_t *)p_temp; - } else { - for(; i > 0U; i--) { + p_temp = (uint32_t)transmit_message->tx_data; + if((0U == i)) { CAN_TMDATA0(can_periph, mailbox_number) = *(uint32_t *)p_temp; - p_temp = ((uint32_t)((uint32_t)p_temp + 4U)); + } else { + for(; i > 0U; i--) { + CAN_TMDATA0(can_periph, mailbox_number) = *(uint32_t *)p_temp; + p_temp = ((uint32_t)((uint32_t)p_temp + 4U)); + } } + + } else { + CAN_ERROR_HANDLE("CAN FD function disabled \r\n"); } - - } else { - CAN_ERROR_HANDLE("CAN FD function disabled \r\n"); } + + /* enable transmission */ + CAN_TMI(can_periph, mailbox_number) |= CAN_TMI_TEN; } - - /* enable transmission */ - CAN_TMI(can_periph, mailbox_number) |= CAN_TMI_TEN; - return mailbox_number; } @@ -901,25 +900,63 @@ can_transmit_state_enum can_transmit_states(uint32_t can_periph, uint8_t mailbox only one parameter can be selected which is shown as below: \arg CAN_MAILBOXx(x=0,1,2) \param[out] none - \retval none + \retval ErrStatus: ERROR or SUCCESS */ -void can_transmission_stop(uint32_t can_periph, uint8_t mailbox_number) +ErrStatus can_transmission_stop(uint32_t can_periph, uint8_t mailbox_number) { + ErrStatus reval = SUCCESS; + /* timeout for CAN_TSTAT_MSTx bits */ + uint32_t timeout = CAN_TIMEOUT; + uint32_t reg_value0 = 0U; + uint32_t reg_value1 = 0U; + + /* get the status of transmit FIFO order */ + reg_value0 = CAN_CTL(can_periph) & CAN_CTL_TFO; + if(CAN_MAILBOX0 == mailbox_number) { - CAN_TSTAT(can_periph) |= CAN_TSTAT_MST0; - while(CAN_TSTAT_MST0 == (CAN_TSTAT(can_periph) & CAN_TSTAT_MST0)) { + reg_value1 = CAN_TSTAT(can_periph) & (CAN_TSTAT_TMLS0 | CAN_ALL_MAILBOX_EMPTY); + if((CAN_CTL_TFO == reg_value0) && (CAN_TSTAT_TMLS0 == reg_value1)){ + reval = ERROR; + } else { + CAN_TSTAT(can_periph) |= CAN_TSTAT_MST0; + while((CAN_TSTAT_MST0 == (CAN_TSTAT(can_periph) & CAN_TSTAT_MST0)) && (0U != timeout)) { + timeout--; + } + if(CAN_TSTAT_MST0 == (CAN_TSTAT(can_periph) & CAN_TSTAT_MST0)){ + reval = ERROR; + } } } else if(CAN_MAILBOX1 == mailbox_number) { - CAN_TSTAT(can_periph) |= CAN_TSTAT_MST1; - while(CAN_TSTAT_MST1 == (CAN_TSTAT(can_periph) & CAN_TSTAT_MST1)) { + reg_value1 = CAN_TSTAT(can_periph) & (CAN_TSTAT_TMLS1 | CAN_ALL_MAILBOX_EMPTY); + if((CAN_CTL_TFO == reg_value0) && (CAN_TSTAT_TMLS1 == reg_value1)){ + reval = ERROR; + }else{ + CAN_TSTAT(can_periph) |= CAN_TSTAT_MST1; + while((CAN_TSTAT_MST1 == (CAN_TSTAT(can_periph) & CAN_TSTAT_MST1)) && (0U != timeout)) { + timeout--; + } + if(CAN_TSTAT_MST1 == (CAN_TSTAT(can_periph) & CAN_TSTAT_MST1)){ + reval = ERROR; + } } + } else if(CAN_MAILBOX2 == mailbox_number) { - CAN_TSTAT(can_periph) |= CAN_TSTAT_MST2; - while(CAN_TSTAT_MST2 == (CAN_TSTAT(can_periph) & CAN_TSTAT_MST2)) { + reg_value1 = CAN_TSTAT(can_periph) & (CAN_TSTAT_TMLS2 | CAN_ALL_MAILBOX_EMPTY); + if((CAN_CTL_TFO == reg_value0) && (CAN_TSTAT_TMLS2 == reg_value1)){ + reval = ERROR; + }else{ + CAN_TSTAT(can_periph) |= CAN_TSTAT_MST2; + while((CAN_TSTAT_MST2 == (CAN_TSTAT(can_periph) & CAN_TSTAT_MST2)) && (0U != timeout)) { + timeout--; + } + if(CAN_TSTAT_MST2 == (CAN_TSTAT(can_periph) & CAN_TSTAT_MST2)){ + reval = ERROR; + } } } else { /* illegal parameters */ } + return reval; } /*! @@ -976,13 +1013,10 @@ void can_message_receive(uint32_t can_periph, uint8_t fifo_number, can_receive_m receive_message->rx_data[5] = (uint8_t)(GET_RFIFOMDATA1_DB5(CAN_RFIFOMDATA1(can_periph, fifo_number))); receive_message->rx_data[6] = (uint8_t)(GET_RFIFOMDATA1_DB6(CAN_RFIFOMDATA1(can_periph, fifo_number))); receive_message->rx_data[7] = (uint8_t)(GET_RFIFOMDATA1_DB7(CAN_RFIFOMDATA1(can_periph, fifo_number))); - - } else { - printf("CAN FD function disabled but FD frame received\r\n"); - // CAN_ERROR_HANDLE("CAN FD function disabled \r\n"); + } else { + CAN_ERROR_HANDLE("CAN FD function disabled \r\n"); } } else { - /* check FD function has been enabled */ /* get receive data length */ canfd_recv_cnt = (uint8_t)(GET_RFIFOMP_DLENC(CAN_RFIFOMP(can_periph, fifo_number))); @@ -1322,12 +1356,14 @@ void can_interrupt_disable(uint32_t can_periph, uint32_t interrupt) */ FlagStatus can_flag_get(uint32_t can_periph, can_flag_enum flag) { + FlagStatus retval; /* get flag and interrupt enable state */ if(RESET != (CAN_REG_VAL(can_periph, flag) & BIT(CAN_BIT_POS(flag)))) { - return SET; + retval = SET; } else { - return RESET; + retval = RESET; } + return retval; } /*! @@ -1390,6 +1426,7 @@ void can_flag_clear(uint32_t can_periph, can_flag_enum flag) */ FlagStatus can_interrupt_flag_get(uint32_t can_periph, can_interrupt_flag_enum flag) { + FlagStatus retval; uint32_t ret1 = RESET; uint32_t ret2 = RESET; @@ -1406,10 +1443,11 @@ FlagStatus can_interrupt_flag_get(uint32_t can_periph, can_interrupt_flag_enum f /* get the status of interrupt enable bit */ ret2 = CAN_INTEN(can_periph) & BIT(CAN_BIT_POS1(flag)); if(ret1 && ret2) { - return SET; + retval = SET; } else { - return RESET; + retval = RESET; } + return retval; } /*! diff --git a/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_crc.c b/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_crc.c index 9525060..648030e 100644 --- a/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_crc.c +++ b/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_crc.c @@ -2,11 +2,11 @@ \file gd32c10x_crc.c \brief CRC driver - \version 2025-08-07, V1.6.0, firmware for GD32C10x + \version 2026-01-30, V1.7.0, firmware for GD32C10x */ /* - Copyright (c) 2025, GigaDevice Semiconductor Inc. + Copyright (c) 2026, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -117,11 +117,11 @@ uint32_t crc_single_data_calculate(uint32_t sdata) \param[out] none \retval 32-bit value calculated by CRC */ -uint32_t crc_block_data_calculate(const uint32_t *array, uint32_t size) +uint32_t crc_block_data_calculate(uint32_t array[], uint32_t size) { uint32_t index; for(index = 0U; index < size; index++){ - CRC_DATA = *(array+index); + CRC_DATA = array[index]; } return (CRC_DATA); } diff --git a/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_ctc.c b/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_ctc.c index 44d1fcf..2498763 100644 --- a/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_ctc.c +++ b/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_ctc.c @@ -2,11 +2,11 @@ \file gd32c10x_ctc.c \brief CTC driver - \version 2025-08-07, V1.6.0, firmware for GD32C10x + \version 2026-01-30, V1.7.0, firmware for GD32C10x */ /* - Copyright (c) 2025, GigaDevice Semiconductor Inc. + Copyright (c) 2026, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -79,7 +79,7 @@ void ctc_counter_disable(void) /*! \brief configure the IRC48M trim value - \param[in] ctc_trim_value: 8-bit IRC48M trim value + \param[in] trim_value: 8-bit IRC48M trim value \arg 0x00 - 0x3F \param[out] none \retval none @@ -218,11 +218,14 @@ uint16_t ctc_counter_capture_value_read(void) */ FlagStatus ctc_counter_direction_read(void) { + FlagStatus ret; + if(RESET != (CTC_STAT & CTC_STAT_REFDIR)){ - return SET; + ret = SET; }else{ - return RESET; + ret = RESET; } + return ret; } /*! @@ -300,7 +303,8 @@ void ctc_interrupt_disable(uint32_t interrupt) FlagStatus ctc_interrupt_flag_get(uint32_t interrupt) { uint32_t intflag = 0U, intenable = 0U; - + FlagStatus ret; + /* check whether the interrupt is enabled */ if(RESET != (interrupt & CTC_FLAG_MASK)){ intenable = CTC_CTL0 & CTC_CTL0_ERRIE; @@ -312,10 +316,11 @@ FlagStatus ctc_interrupt_flag_get(uint32_t interrupt) intflag = CTC_STAT & interrupt; if(intflag && intenable){ - return SET; + ret = SET; }else{ - return RESET; + ret = RESET; } + return ret; } /*! @@ -357,11 +362,14 @@ void ctc_interrupt_flag_clear(uint32_t interrupt) */ FlagStatus ctc_flag_get(uint32_t flag) { + FlagStatus ret; + if(RESET != (CTC_STAT & flag)){ - return SET; + ret = SET; }else{ - return RESET; + ret = RESET; } + return ret; } /*! diff --git a/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_dac.c b/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_dac.c index 06b662c..f880aee 100644 --- a/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_dac.c +++ b/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_dac.c @@ -2,11 +2,11 @@ \file gd32c10x_dac.c \brief DAC driver - \version 2025-08-07, V1.6.0, firmware for GD32C10x + \version 2026-01-30, V1.7.0, firmware for GD32C10x */ /* - Copyright (c) 2025, GigaDevice Semiconductor Inc. + Copyright (c) 2026, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -318,6 +318,7 @@ void dac_trigger_source_config(uint32_t dac_periph, uint8_t dac_out, uint32_t tr \brief enable DAC software trigger \param[in] dac_periph: DACx(x=0) \param[in] dac_out: DAC_OUTx(x=0,1) + \param[out] none \retval none */ void dac_software_trigger_enable(uint32_t dac_periph, uint8_t dac_out) diff --git a/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_dbg.c b/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_dbg.c index d241f64..5adfc41 100644 --- a/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_dbg.c +++ b/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_dbg.c @@ -2,11 +2,11 @@ \file gd32c10x_dbg.c \brief DBG driver - \version 2025-08-07, V1.6.0, firmware for GD32C10x + \version 2026-01-30, V1.7.0, firmware for GD32C10x */ /* - Copyright (c) 2025, GigaDevice Semiconductor Inc. + Copyright (c) 2026, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: diff --git a/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_dma.c b/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_dma.c index 1b083d6..baf1f82 100644 --- a/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_dma.c +++ b/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_dma.c @@ -2,11 +2,11 @@ \file gd32c10x_dma.c \brief DMA driver - \version 2025-08-07, V1.6.0, firmware for GD32C10x + \version 2026-01-30, V1.7.0, firmware for GD32C10x */ /* - Copyright (c) 2025, GigaDevice Semiconductor Inc. + Copyright (c) 2026, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -614,6 +614,7 @@ void dma_flag_clear(uint32_t dma_periph, dma_channel_enum channelx, uint32_t fla FlagStatus dma_interrupt_flag_get(uint32_t dma_periph, dma_channel_enum channelx, uint32_t flag) { uint32_t interrupt_enable = 0U, interrupt_flag = 0U; + FlagStatus status = RESET; switch(flag){ case DMA_INT_FLAG_FTF: @@ -637,10 +638,11 @@ FlagStatus dma_interrupt_flag_get(uint32_t dma_periph, dma_channel_enum channelx /* when the interrupt flag is set and enabled, return SET */ if((0U != interrupt_flag) && (0U != interrupt_enable)){ - return SET; + status = SET; }else{ - return RESET; + status = RESET; } + return status; } /*! diff --git a/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_exmc.c b/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_exmc.c index 8fb26c9..eeffa67 100644 --- a/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_exmc.c +++ b/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_exmc.c @@ -2,11 +2,11 @@ \file gd32c10x_exmc.c \brief EXMC driver - \version 2025-08-07, V1.6.0, firmware for GD32C10x + \version 2026-01-30, V1.7.0, firmware for GD32C10x */ /* - Copyright (c) 2025, GigaDevice Semiconductor Inc. + Copyright (c) 2026, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: diff --git a/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_exti.c b/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_exti.c index b1925dc..1d8276f 100644 --- a/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_exti.c +++ b/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_exti.c @@ -2,11 +2,11 @@ \file gd32c10x_exti.c \brief EXTI driver - \version 2025-08-07, V1.6.0, firmware for GD32C10x + \version 2026-01-30, V1.7.0, firmware for GD32C10x */ /* - Copyright (c) 2025, GigaDevice Semiconductor Inc. + Copyright (c) 2026, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -196,11 +196,14 @@ void exti_software_interrupt_disable(exti_line_enum linex) */ FlagStatus exti_flag_get(exti_line_enum linex) { + FlagStatus ret; + if(RESET != (EXTI_PD & (uint32_t)linex)) { - return SET; + ret = SET; } else { - return RESET; + ret = RESET; } + return ret; } /*! @@ -226,11 +229,14 @@ void exti_flag_clear(exti_line_enum linex) */ FlagStatus exti_interrupt_flag_get(exti_line_enum linex) { + FlagStatus ret; + if(RESET != (EXTI_PD & (uint32_t)linex)) { - return SET; + ret = SET; } else { - return RESET; + ret = RESET; } + return ret; } /*! diff --git a/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_fmc.c b/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_fmc.c index 7f29736..7c38e0b 100644 --- a/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_fmc.c +++ b/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_fmc.c @@ -2,11 +2,11 @@ \file gd32c10x_fmc.c \brief FMC driver - \version 2025-08-07, V1.6.0, firmware for GD32C10x + \version 2026-01-30, V1.7.0, firmware for GD32C10x */ /* - Copyright (c) 2025, GigaDevice Semiconductor Inc. + Copyright (c) 2026, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -33,7 +33,6 @@ OF SUCH DAMAGE. */ #include "gd32c10x_fmc.h" -#include "stdio.h" /* FMC mask */ #define LOW_8BITS_MASK ((uint32_t)0x000000FFU) @@ -508,7 +507,7 @@ fmc_state_enum ob_write_protection_enable(uint32_t ob_wp) */ fmc_state_enum ob_security_protection_config(uint8_t ob_spc) { - uint8_t i; + uint32_t i; uint32_t op_byte[4]; fmc_state_enum fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT); for(i = 0U; i < 4U; i++){ @@ -574,7 +573,7 @@ fmc_state_enum ob_security_protection_config(uint8_t ob_spc) */ fmc_state_enum ob_user_write(uint8_t ob_fwdgt, uint8_t ob_deepsleep, uint8_t ob_stdby) { - uint8_t i; + uint32_t i; uint32_t temp; uint32_t op_byte[4]; fmc_state_enum fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT); @@ -582,7 +581,7 @@ fmc_state_enum ob_user_write(uint8_t ob_fwdgt, uint8_t ob_deepsleep, uint8_t ob_ for(i = 0U; i < 4U; i++){ op_byte[i] = OP_BYTE(i); } - temp = ((uint8_t)((uint8_t)((uint8_t)(ob_fwdgt) | ob_deepsleep) | ob_stdby) | (OB_USER_MASK)); + temp = (uint32_t)(((uint32_t)((uint32_t)(ob_fwdgt) | ob_deepsleep) | ob_stdby) | OB_USER_MASK); op_byte[0] = ((uint32_t)(temp) << 16U) | ((op_byte[0] & LOW_16BITS_MASK)); if(FMC_READY == fmc_state){ @@ -632,7 +631,7 @@ fmc_state_enum ob_user_write(uint8_t ob_fwdgt, uint8_t ob_deepsleep, uint8_t ob_ fmc_state_enum ob_data_program(uint16_t ob_data) { - uint8_t i; + uint32_t i; uint32_t op_byte[4]; fmc_state_enum fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT); for(i = 0U; i < 4U; i++){ @@ -774,17 +773,21 @@ void fmc_ecc_interrupt_disable(uint32_t interrupt) FlagStatus fmc_ecc_interrupt_flag_get(uint32_t int_flag) { uint32_t intenable = 0U, flagstatus = 0U; + + FlagStatus status = RESET; /* get the interrupt enable bit status */ intenable = (FMC_REG_VAL(int_flag) & BIT(FMC_BIT_POS(int_flag))); /* get the corresponding flag bit status */ flagstatus = (FMC_REG_VAL2(int_flag) & BIT(FMC_BIT_POS2(int_flag))); if(flagstatus && intenable) { - return SET; + status = SET; } else { - return RESET; + status = RESET; } + /* return the state of corresponding FMC interrupt flag */ + return status; } /*! @@ -989,7 +992,7 @@ void fmc_interrupt_flag_clear(uint32_t flag) static fmc_state_enum fmc_state_get(void) { fmc_state_enum fmc_state = FMC_READY; - + if((uint32_t)0x00U != (FMC_STAT & FMC_STAT_BUSY)){ fmc_state = FMC_BUSY; }else{ diff --git a/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_fwdgt.c b/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_fwdgt.c index 35661db..7c4ef70 100644 --- a/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_fwdgt.c +++ b/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_fwdgt.c @@ -2,11 +2,11 @@ \file gd32c10x_fwdgt.c \brief FWDGT driver - \version 2025-08-07, V1.6.0, firmware for GD32C10x + \version 2026-01-30, V1.7.0, firmware for GD32C10x */ /* - Copyright (c) 2025, GigaDevice Semiconductor Inc. + Copyright (c) 2026, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -84,24 +84,25 @@ void fwdgt_enable(void) ErrStatus fwdgt_prescaler_value_config(uint16_t prescaler_value) { uint32_t timeout = FWDGT_PSC_TIMEOUT; - uint32_t flag_status = RESET; + uint32_t flag_status; + ErrStatus status = SUCCESS; /* enable write access to FWDGT_PSC */ FWDGT_CTL = FWDGT_WRITEACCESS_ENABLE; + /* configure FWDGT_PSC */ + FWDGT_PSC = (uint32_t)prescaler_value; + /* wait until the PUD flag to be reset */ do { flag_status = FWDGT_STAT & FWDGT_STAT_PUD; - } while((--timeout > 0U) && ((uint32_t)RESET != flag_status)); + } while((--timeout > 0U) && (0U != flag_status)); - if((uint32_t)RESET != flag_status) { - return ERROR; + if(0U != flag_status) { + status = ERROR; } - /* configure FWDGT */ - FWDGT_PSC = (uint32_t)prescaler_value; - - return SUCCESS; + return status; } /*! @@ -113,23 +114,25 @@ ErrStatus fwdgt_prescaler_value_config(uint16_t prescaler_value) ErrStatus fwdgt_reload_value_config(uint16_t reload_value) { uint32_t timeout = FWDGT_RLD_TIMEOUT; - uint32_t flag_status = RESET; + uint32_t flag_status; + ErrStatus status = SUCCESS; /* enable write access to FWDGT_RLD */ FWDGT_CTL = FWDGT_WRITEACCESS_ENABLE; + /* configure FWDGT_RLD */ + FWDGT_RLD = RLD_RLD(reload_value); + /* wait until the RUD flag to be reset */ do { flag_status = FWDGT_STAT & FWDGT_STAT_RUD; - } while((--timeout > 0U) && ((uint32_t)RESET != flag_status)); + } while((--timeout > 0U) && (0U != flag_status)); - if((uint32_t)RESET != flag_status) { - return ERROR; + if(0U != flag_status) { + status = ERROR; } - FWDGT_RLD = RLD_RLD(reload_value); - - return SUCCESS; + return status; } /*! @@ -146,7 +149,7 @@ void fwdgt_counter_reload(void) /*! \brief configure counter reload value, and prescaler divider value \param[in] reload_value: specify reload value(0x0000 - 0x0FFF) - \param[in] prescaler_div: FWDGT prescaler value + \param[in] prescaler_value: FWDGT prescaler value only one parameter can be selected which is shown as below: \arg FWDGT_PSC_DIV4: FWDGT prescaler set to 4 \arg FWDGT_PSC_DIV8: FWDGT prescaler set to 8 @@ -158,42 +161,51 @@ void fwdgt_counter_reload(void) \param[out] none \retval ErrStatus: ERROR or SUCCESS */ -ErrStatus fwdgt_config(uint16_t reload_value, uint8_t prescaler_div) +ErrStatus fwdgt_config(uint16_t reload_value, uint8_t prescaler_value) { uint32_t timeout = FWDGT_PSC_TIMEOUT; - uint32_t flag_status = RESET; + uint32_t flag_status; + ErrStatus status = SUCCESS; + + /* start the free watchdog timer counter */ + FWDGT_CTL = FWDGT_KEY_ENABLE; /* enable write access to FWDGT_PSC,and FWDGT_RLD */ FWDGT_CTL = FWDGT_WRITEACCESS_ENABLE; + /* configure FWDGT_PSC */ + FWDGT_PSC = (uint32_t)prescaler_value; + /* wait until the PUD flag to be reset */ do { flag_status = FWDGT_STAT & FWDGT_STAT_PUD; - } while((--timeout > 0U) && ((uint32_t)RESET != flag_status)); + } while((--timeout > 0U) && (0U != flag_status)); - if((uint32_t)RESET != flag_status) { - return ERROR; + if(0U != flag_status) { + status = ERROR; } - /* configure FWDGT */ - FWDGT_PSC = (uint32_t)prescaler_div; + if(SUCCESS == status) { + /* configure FWDGT_RLD */ + FWDGT_RLD = RLD_RLD(reload_value); - timeout = FWDGT_RLD_TIMEOUT; - /* wait until the RUD flag to be reset */ - do { - flag_status = FWDGT_STAT & FWDGT_STAT_RUD; - } while((--timeout > 0U) && ((uint32_t)RESET != flag_status)); + /* wait until the RUD flag to be reset */ + timeout = FWDGT_RLD_TIMEOUT; + do { + flag_status = FWDGT_STAT & FWDGT_STAT_RUD; + } while((--timeout > 0U) && (0U != flag_status)); - if((uint32_t)RESET != flag_status) { - return ERROR; + if(0U != flag_status) { + status = ERROR; + } } - FWDGT_RLD = RLD_RLD(reload_value); + if(SUCCESS == status) { + /* reload the counter */ + FWDGT_CTL = FWDGT_KEY_RELOAD; + } - /* reload the counter */ - FWDGT_CTL = FWDGT_KEY_RELOAD; - - return SUCCESS; + return status; } /*! @@ -207,9 +219,10 @@ ErrStatus fwdgt_config(uint16_t reload_value, uint8_t prescaler_div) */ FlagStatus fwdgt_flag_get(uint16_t flag) { - if(FWDGT_STAT & flag) { - return SET; - } + FlagStatus flag_status = RESET; - return RESET; + if(RESET != (FWDGT_STAT & flag)) { + flag_status = SET; + } + return flag_status; } diff --git a/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_gpio.c b/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_gpio.c index 233dbc5..7ccdf53 100644 --- a/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_gpio.c +++ b/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_gpio.c @@ -2,11 +2,11 @@ \file gd32c10x_gpio.c \brief GPIO driver - \version 2025-08-07, V1.6.0, firmware for GD32C10x + \version 2026-01-30, V1.7.0, firmware for GD32C10x */ /* - Copyright (c) 2025, GigaDevice Semiconductor Inc. + Copyright (c) 2026, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -264,11 +264,13 @@ void gpio_port_write(uint32_t gpio_periph,uint16_t data) */ FlagStatus gpio_input_bit_get(uint32_t gpio_periph,uint32_t pin) { + FlagStatus status = RESET; if((uint32_t)RESET != (GPIO_ISTAT(gpio_periph)&(pin))){ - return SET; + status = SET; }else{ - return RESET; + status = RESET; } + return status; } /*! @@ -293,11 +295,13 @@ uint16_t gpio_input_port_get(uint32_t gpio_periph) */ FlagStatus gpio_output_bit_get(uint32_t gpio_periph, uint32_t pin) { + FlagStatus status = RESET; if((uint32_t)RESET !=(GPIO_OCTL(gpio_periph)&(pin))){ - return SET; + status = SET; }else{ - return RESET; + status = RESET; } + return status; } /*! @@ -530,9 +534,11 @@ void gpio_compensation_config(uint32_t compensation) */ FlagStatus gpio_compensation_flag_get(void) { + FlagStatus status = RESET; if(((uint32_t)RESET) != (AFIO_CPSCTL & AFIO_CPSCTL_CPS_RDY)){ - return SET; + status = SET; }else{ - return RESET; + status = RESET; } + return status; } diff --git a/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_i2c.c b/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_i2c.c index 662a67f..e2d9fc7 100644 --- a/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_i2c.c +++ b/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_i2c.c @@ -2,11 +2,11 @@ \file gd32c10x_i2c.c \brief I2C driver - \version 2025-08-07, V1.6.0, firmware for GD32C10x + \version 2026-01-30, V1.7.0, firmware for GD32C10x */ /* - Copyright (c) 2025, GigaDevice Semiconductor Inc. + Copyright (c) 2026, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -635,11 +635,13 @@ void i2c_sam_timeout_disable(uint32_t i2c_periph) */ FlagStatus i2c_flag_get(uint32_t i2c_periph, i2c_flag_enum flag) { + FlagStatus status = RESET; if(RESET != (I2C_REG_VAL(i2c_periph, flag) & BIT(I2C_BIT_POS(flag)))){ - return SET; + status = SET; }else{ - return RESET; + status = RESET; } + return status; } /*! @@ -742,6 +744,7 @@ void i2c_interrupt_disable(uint32_t i2c_periph, i2c_interrupt_enum interrupt) FlagStatus i2c_interrupt_flag_get(uint32_t i2c_periph, i2c_interrupt_flag_enum int_flag) { uint32_t intenable = 0U, flagstatus = 0U, bufie; + FlagStatus status = RESET; /* check BUFIE */ bufie = I2C_CTL1(i2c_periph)&I2C_CTL1_BUFIE; @@ -759,10 +762,11 @@ FlagStatus i2c_interrupt_flag_get(uint32_t i2c_periph, i2c_interrupt_flag_enum i } } if((0U != flagstatus) && (0U != intenable)){ - return SET; + status = SET; }else{ - return RESET; + status = RESET; } + return status; } /*! diff --git a/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_misc.c b/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_misc.c index 5883aac..8c75f9f 100644 --- a/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_misc.c +++ b/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_misc.c @@ -2,11 +2,11 @@ \file gd32c10x_misc.c \brief MISC driver - \version 2025-08-07, V1.6.0, firmware for GD32C10x + \version 2026-01-30, V1.7.0, firmware for GD32C10x */ /* - Copyright (c) 2025, GigaDevice Semiconductor Inc. + Copyright (c) 2026, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -63,45 +63,31 @@ void nvic_irq_enable(IRQn_Type nvic_irq, uint8_t nvic_irq_pre_priority, uint8_t nvic_irq_sub_priority) { - uint32_t temp_priority = 0x00U, temp_pre = 0x00U, temp_sub = 0x00U; + uint32_t nvic_prigroup, nvic_priority; - /* use the priority group value to get the temp_pre and the temp_sub */ - switch((SCB->AIRCR) & (uint32_t)0x700U) { + /* check current priority group */ + switch(SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) { case NVIC_PRIGROUP_PRE0_SUB4: - temp_pre = 0U; - temp_sub = 0x4U; - break; case NVIC_PRIGROUP_PRE1_SUB3: - temp_pre = 1U; - temp_sub = 0x3U; - break; case NVIC_PRIGROUP_PRE2_SUB2: - temp_pre = 2U; - temp_sub = 0x2U; - break; case NVIC_PRIGROUP_PRE3_SUB1: - temp_pre = 3U; - temp_sub = 0x1U; - break; case NVIC_PRIGROUP_PRE4_SUB0: - temp_pre = 4U; - temp_sub = 0x0U; break; default: nvic_priority_group_set(NVIC_PRIGROUP_PRE2_SUB2); - temp_pre = 2U; - temp_sub = 0x2U; break; } - /* get the temp_priority to fill the NVIC->IP register */ - temp_priority = (uint32_t)nvic_irq_pre_priority << (0x4U - temp_pre); - temp_priority |= nvic_irq_sub_priority & (0x0FU >> (0x4U - temp_sub)); - temp_priority = temp_priority << 0x04U; - NVIC->IP[nvic_irq] = (uint8_t)temp_priority; + /* get the priority group value */ + nvic_prigroup = NVIC_GetPriorityGrouping(); + + /* encoding the pre-emption, subpriority priority */ + nvic_priority = NVIC_EncodePriority(nvic_prigroup, (uint32_t)nvic_irq_pre_priority, (uint32_t)nvic_irq_sub_priority); + /* set priority */ + NVIC_SetPriority(nvic_irq, nvic_priority); /* enable the selected IRQ */ - NVIC->ISER[nvic_irq >> 0x05U] = (uint32_t)0x01U << (nvic_irq & (uint8_t)0x1FU); + NVIC_EnableIRQ(nvic_irq); } /*! @@ -113,7 +99,7 @@ void nvic_irq_enable(IRQn_Type nvic_irq, void nvic_irq_disable(IRQn_Type nvic_irq) { /* disable the selected IRQ.*/ - NVIC->ICER[nvic_irq >> 0x05U] = (uint32_t)0x01U << (nvic_irq & (uint8_t)0x1FU); + NVIC->ICER[(uint32_t)nvic_irq >> 0x05U] = (uint32_t)0x01U << ((uint32_t)nvic_irq & (uint8_t)0x1FU); } /*! diff --git a/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_pmu.c b/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_pmu.c index a852732..b71f9ef 100644 --- a/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_pmu.c +++ b/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_pmu.c @@ -2,11 +2,11 @@ \file gd32c10x_pmu.c \brief PMU driver - \version 2025-08-07, V1.6.0, firmware for GD32C10x + \version 2026-01-30, V1.7.0, firmware for GD32C10x */ /* - Copyright (c) 2025, GigaDevice Semiconductor Inc. + Copyright (c) 2026, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -261,11 +261,14 @@ void pmu_backup_write_disable(void) */ FlagStatus pmu_flag_get(uint32_t flag) { + FlagStatus ret; + if(RESET != (PMU_CS & flag)){ - return SET; + ret = SET; }else{ - return RESET; + ret = RESET; } + return ret; } /*! diff --git a/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_rcu.c b/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_rcu.c index 89007c4..beecfd6 100644 --- a/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_rcu.c +++ b/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_rcu.c @@ -2,11 +2,11 @@ \file gd32c10x_rcu.c \brief RCU driver - \version 2025-08-07, V1.6.0, firmware for GD32C10x + \version 2026-01-30, V1.7.0, firmware for GD32C10x */ /* - Copyright (c) 2025, GigaDevice Semiconductor Inc. + Copyright (c) 2026, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -565,7 +565,7 @@ void rcu_adc_clock_config(uint32_t adc_psc) /*! \brief configure the USBFS prescaler factor - \param[in] adc_div: USB prescaler factor + \param[in] usb_psc: USB prescaler factor only one parameter can be selected which is shown as below: \arg RCU_CKUSB_CKPLL_DIV1_5: USBFS prescaler select CK_PLL/1.5 \arg RCU_CKUSB_CKPLL_DIV1: USBFS prescaler select CK_PLL/1 @@ -690,12 +690,16 @@ void rcu_ck48m_clock_config(uint32_t ck48m_clock_source) */ FlagStatus rcu_flag_get(rcu_flag_enum flag) { + FlagStatus rcu_flag = RESET; + /* get the rcu flag */ if(RESET != (RCU_REG_VAL(flag) & BIT(RCU_BIT_POS(flag)))){ - return SET; + rcu_flag = SET; }else{ - return RESET; + rcu_flag = RESET; } + + return rcu_flag; } /*! @@ -727,12 +731,16 @@ void rcu_all_reset_flag_clear(void) */ FlagStatus rcu_interrupt_flag_get(rcu_int_flag_enum int_flag) { + FlagStatus rcu_int_flag = RESET; + /* get the rcu interrupt flag */ if(RESET != (RCU_REG_VAL(int_flag) & BIT(RCU_BIT_POS(int_flag)))){ - return SET; + rcu_int_flag = SET; }else{ - return RESET; + rcu_int_flag = RESET; } + + return rcu_int_flag; } /*! diff --git a/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_rtc.c b/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_rtc.c index d124ad7..776d900 100644 --- a/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_rtc.c +++ b/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_rtc.c @@ -2,11 +2,11 @@ \file gd32c10x_rtc.c \brief RTC driver - \version 2025-08-07, V1.6.0, firmware for GD32C10x + \version 2026-01-30, V1.7.0, firmware for GD32C10x */ /* - Copyright (c) 2025, GigaDevice Semiconductor Inc. + Copyright (c) 2026, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -191,11 +191,14 @@ uint32_t rtc_divider_get(void) */ FlagStatus rtc_flag_get(uint32_t flag) { + FlagStatus ret; + if(RESET != (RTC_CTL & flag)){ - return SET; + ret = SET; }else{ - return RESET; + ret = RESET; } + return ret; } /*! @@ -227,11 +230,14 @@ void rtc_flag_clear(uint32_t flag) */ FlagStatus rtc_interrupt_flag_get(uint32_t flag) { + FlagStatus ret; + if(RESET != (RTC_CTL & flag)){ - return SET; + ret = SET; }else{ - return RESET; + ret = RESET; } + return ret; } /*! diff --git a/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_spi.c b/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_spi.c index f07e114..7ef3499 100644 --- a/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_spi.c +++ b/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_spi.c @@ -2,11 +2,11 @@ \file gd32c10x_spi.c \brief SPI driver - \version 2025-08-07, V1.6.0, firmware for GD32C10x + \version 2026-01-30, V1.7.0, firmware for GD32C10x */ /* - Copyright (c) 2025, GigaDevice Semiconductor Inc. + Copyright (c) 2026, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -564,11 +564,14 @@ void spi_crc_next(uint32_t spi_periph) */ uint16_t spi_crc_get(uint32_t spi_periph,uint8_t crc) { + uint16_t crc_value; if(SPI_CRC_TX == crc){ - return ((uint16_t)(SPI_TCRC(spi_periph))); + crc_value = ((uint16_t)(SPI_TCRC(spi_periph))); }else{ - return ((uint16_t)(SPI_RCRC(spi_periph))); + crc_value = ((uint16_t)(SPI_RCRC(spi_periph))); } + + return crc_value; } /*! @@ -670,28 +673,6 @@ void spi_quad_read_enable(uint32_t spi_periph) SPI_QCTL(spi_periph) |= (uint32_t)SPI_QCTL_QRD; } -/*! - \brief enable SPI quad wire mode SPI_IO2 and SPI_IO3 pin output - \param[in] spi_periph: SPIx(only x=0) - \param[out] none - \retval none -*/ -void spi_quad_io23_output_enable(uint32_t spi_periph) -{ - SPI_QCTL(spi_periph) |= (uint32_t)SPI_QCTL_IO23_DRV; -} - - /*! - \brief disable SPI quad wire mode SPI_IO2 and SPI_IO3 pin output - \param[in] spi_periph: SPIx(only x=0) - \param[out] none - \retval none -*/ -void spi_quad_io23_output_disable(uint32_t spi_periph) -{ - SPI_QCTL(spi_periph) &= (uint32_t)(~SPI_QCTL_IO23_DRV); -} - /*! \brief enable SPI and I2S interrupt \param[in] spi_periph: SPIx(x=0,1,2) @@ -773,6 +754,7 @@ void spi_i2s_interrupt_disable(uint32_t spi_periph, uint8_t interrupt) */ FlagStatus spi_i2s_interrupt_flag_get(uint32_t spi_periph, uint8_t interrupt) { + FlagStatus status = RESET; uint32_t reg1 = SPI_STAT(spi_periph); uint32_t reg2 = SPI_CTL1(spi_periph); @@ -817,10 +799,12 @@ FlagStatus spi_i2s_interrupt_flag_get(uint32_t spi_periph, uint8_t interrupt) } /* get SPI/I2S interrupt flag status */ if((0U != reg1) && (0U != reg2)){ - return SET; + status = SET; }else{ - return RESET; + status = RESET; } + + return status; } /*! @@ -847,9 +831,12 @@ FlagStatus spi_i2s_interrupt_flag_get(uint32_t spi_periph, uint8_t interrupt) */ FlagStatus spi_i2s_flag_get(uint32_t spi_periph, uint32_t flag) { + FlagStatus status = RESET; if(RESET != (SPI_STAT(spi_periph) & flag)){ - return SET; + status = SET; }else{ - return RESET; + status = RESET; } + + return status; } diff --git a/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_timer.c b/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_timer.c index 5112573..035ed5a 100644 --- a/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_timer.c +++ b/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_timer.c @@ -2,11 +2,11 @@ \file gd32c10x_timer.c \brief TIMER driver - \version 2025-08-07, V1.6.0, firmware for GD32C10x + \version 2026-01-30, V1.7.0, firmware for GD32C10x */ /* - Copyright (c) 2025, GigaDevice Semiconductor Inc. + Copyright (c) 2026, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -1955,12 +1955,14 @@ void timer_interrupt_disable(uint32_t timer_periph, uint32_t interrupt) FlagStatus timer_interrupt_flag_get(uint32_t timer_periph, uint32_t interrupt) { uint32_t val; + FlagStatus ret; val = (TIMER_DMAINTEN(timer_periph) & interrupt); if((RESET != (TIMER_INTF(timer_periph) & interrupt)) && (RESET != val)){ - return SET; + ret = SET; }else{ - return RESET; + ret = RESET; } + return ret; } /*! @@ -2006,11 +2008,13 @@ void timer_interrupt_flag_clear(uint32_t timer_periph, uint32_t interrupt) */ FlagStatus timer_flag_get(uint32_t timer_periph, uint32_t flag) { + FlagStatus ret; if(RESET != (TIMER_INTF(timer_periph) & flag)){ - return SET; + ret = SET; }else{ - return RESET; + ret = RESET; } + return ret; } /*! diff --git a/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_usart.c b/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_usart.c index 1abf091..1beaacb 100644 --- a/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_usart.c +++ b/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_usart.c @@ -2,11 +2,11 @@ \file gd32c10x_usart.c \brief USART driver - \version 2025-08-07, V1.6.0, firmware for GD32C10x + \version 2026-01-30, V1.7.0, firmware for GD32C10x */ /* - Copyright (c) 2025, GigaDevice Semiconductor Inc. + Copyright (c) 2026, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -757,11 +757,14 @@ void usart_hardware_flow_coherence_config(uint32_t usart_periph, uint32_t hcm) */ FlagStatus usart_flag_get(uint32_t usart_periph, usart_flag_enum flag) { + FlagStatus ret; + if(RESET != (USART_REG_VAL(usart_periph, flag) & BIT(USART_BIT_POS(flag)))) { - return SET; + ret = SET; } else { - return RESET; + ret = RESET; } + return ret; } /*! @@ -858,16 +861,18 @@ void usart_interrupt_disable(uint32_t usart_periph, usart_interrupt_enum interru FlagStatus usart_interrupt_flag_get(uint32_t usart_periph, usart_interrupt_flag_enum int_flag) { uint32_t intenable = 0U, flagstatus = 0U; + FlagStatus ret; /* get the interrupt enable bit status */ intenable = (USART_REG_VAL(usart_periph, int_flag) & BIT(USART_BIT_POS(int_flag))); /* get the corresponding flag bit status */ flagstatus = (USART_REG_VAL2(usart_periph, int_flag) & BIT(USART_BIT_POS2(int_flag))); if((0U != flagstatus) && (0U != intenable)) { - return SET; + ret = SET; } else { - return RESET; + ret = RESET; } + return ret; } /*! diff --git a/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_wwdgt.c b/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_wwdgt.c index d93e778..190002b 100644 --- a/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_wwdgt.c +++ b/Robot_V2/RTE/Device/GD32C103CB/gd32c10x_wwdgt.c @@ -2,11 +2,11 @@ \file gd32c10x_wwdgt.c \brief WWDGT driver - \version 2025-08-07, V1.6.0, firmware for GD32C10x + \version 2026-01-30, V1.7.0, firmware for GD32C10x */ /* - Copyright (c) 2025, GigaDevice Semiconductor Inc. + Copyright (c) 2026, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -95,11 +95,13 @@ void wwdgt_config(uint16_t counter, uint16_t window, uint32_t prescaler) */ FlagStatus wwdgt_flag_get(void) { + FlagStatus flag_status = RESET; + if(RESET != (WWDGT_STAT & WWDGT_STAT_EWIF)) { - return SET; + flag_status = SET; } - return RESET; + return flag_status; } /*! diff --git a/Robot_V2/RTE/_Release_GD32C103CB/RTE_Components.h b/Robot_V2/RTE/_Release_GD32C103CB/RTE_Components.h index 7115d01..7f24d6e 100644 --- a/Robot_V2/RTE/_Release_GD32C103CB/RTE_Components.h +++ b/Robot_V2/RTE/_Release_GD32C103CB/RTE_Components.h @@ -1,6 +1,6 @@ /* * CSOLUTION generated file: DO NOT EDIT! - * Generated by: csolution version 2.12.0+p41-gfeadfc5e + * Generated by: csolution version 2.13.0+p3-g40b6564e * * Project: 'Robot_V2.Release+GD32C103CB' * Target: 'Release+GD32C103CB' @@ -15,41 +15,41 @@ */ #define CMSIS_device_header "gd32c10x.h" -/* GigaDevice::Device:GD32C10x_StdPeripherals:ADC@1.0.0 */ +/* GigaDevice::Device:GD32C10x_StdPeripherals:ADC@1.3.0 */ #define RTE_DEVICE_STDPERIPHERALS_ADC -/* GigaDevice::Device:GD32C10x_StdPeripherals:BKP@1.0.0 */ +/* GigaDevice::Device:GD32C10x_StdPeripherals:BKP@1.3.0 */ #define RTE_DEVICE_STDPERIPHERALS_BKP -/* GigaDevice::Device:GD32C10x_StdPeripherals:CAN@1.0.0 */ +/* GigaDevice::Device:GD32C10x_StdPeripherals:CAN@1.3.0 */ #define RTE_DEVICE_STDPERIPHERALS_CAN -/* GigaDevice::Device:GD32C10x_StdPeripherals:CRC@1.0.0 */ +/* GigaDevice::Device:GD32C10x_StdPeripherals:CRC@1.3.0 */ #define RTE_DEVICE_STDPERIPHERALS_CRC -/* GigaDevice::Device:GD32C10x_StdPeripherals:DBG@1.0.0 */ +/* GigaDevice::Device:GD32C10x_StdPeripherals:DBG@1.3.0 */ #define RTE_DEVICE_STDPERIPHERALS_DBG -/* GigaDevice::Device:GD32C10x_StdPeripherals:DMA@1.0.0 */ +/* GigaDevice::Device:GD32C10x_StdPeripherals:DMA@1.3.0 */ #define RTE_DEVICE_STDPERIPHERALS_DMA -/* GigaDevice::Device:GD32C10x_StdPeripherals:EXTI@1.0.0 */ +/* GigaDevice::Device:GD32C10x_StdPeripherals:EXTI@1.3.0 */ #define RTE_DEVICE_STDPERIPHERALS_EXTI -/* GigaDevice::Device:GD32C10x_StdPeripherals:FMC@1.0.0 */ +/* GigaDevice::Device:GD32C10x_StdPeripherals:FMC@1.3.0 */ #define RTE_DEVICE_STDPERIPHERALS_FMC -/* GigaDevice::Device:GD32C10x_StdPeripherals:FWDGT@1.0.0 */ +/* GigaDevice::Device:GD32C10x_StdPeripherals:FWDGT@1.3.0 */ #define RTE_DEVICE_STDPERIPHERALS_FWDGT -/* GigaDevice::Device:GD32C10x_StdPeripherals:GPIO@1.0.0 */ +/* GigaDevice::Device:GD32C10x_StdPeripherals:GPIO@1.3.0 */ #define RTE_DEVICE_STDPERIPHERALS_GPIO -/* GigaDevice::Device:GD32C10x_StdPeripherals:MISC@1.0.0 */ +/* GigaDevice::Device:GD32C10x_StdPeripherals:MISC@1.3.0 */ #define RTE_DEVICE_STDPERIPHERALS_MISC -/* GigaDevice::Device:GD32C10x_StdPeripherals:PMU@1.0.0 */ +/* GigaDevice::Device:GD32C10x_StdPeripherals:PMU@1.3.0 */ #define RTE_DEVICE_STDPERIPHERALS_PMU -/* GigaDevice::Device:GD32C10x_StdPeripherals:RCU@1.0.0 */ +/* GigaDevice::Device:GD32C10x_StdPeripherals:RCU@1.3.0 */ #define RTE_DEVICE_STDPERIPHERALS_RCU -/* GigaDevice::Device:GD32C10x_StdPeripherals:RTC@1.0.0 */ +/* GigaDevice::Device:GD32C10x_StdPeripherals:RTC@1.3.0 */ #define RTE_DEVICE_STDPERIPHERALS_RTC -/* GigaDevice::Device:GD32C10x_StdPeripherals:SPI_I2S@1.0.0 */ +/* GigaDevice::Device:GD32C10x_StdPeripherals:SPI_I2S@1.3.0 */ #define RTE_DEVICE_STDPERIPHERALS_SPI -/* GigaDevice::Device:GD32C10x_StdPeripherals:TIMER@1.0.0 */ +/* GigaDevice::Device:GD32C10x_StdPeripherals:TIMER@1.3.0 */ #define RTE_DEVICE_STDPERIPHERALS_TIMER -/* GigaDevice::Device:GD32C10x_StdPeripherals:USART@1.0.0 */ +/* GigaDevice::Device:GD32C10x_StdPeripherals:USART@1.3.0 */ #define RTE_DEVICE_STDPERIPHERALS_USART -/* GigaDevice::Device:GD32C10x_StdPeripherals:WWDGT@1.0.0 */ +/* GigaDevice::Device:GD32C10x_StdPeripherals:WWDGT@1.3.0 */ #define RTE_DEVICE_STDPERIPHERALS_WWDGT diff --git a/Robot_V2/Robot_V2.cproject.yml b/Robot_V2/Robot_V2.cproject.yml index ab6bd24..c4c38eb 100644 --- a/Robot_V2/Robot_V2.cproject.yml +++ b/Robot_V2/Robot_V2.cproject.yml @@ -59,7 +59,7 @@ project: - component: Device:GD32C10x_StdPeripherals:BKP - component: Device:GD32C10x_StdPeripherals:CRC - component: Device:GD32C10x_StdPeripherals:RTC - - component: CMSIS:DSP + - component: CMSIS:DSP&Source output: type: - elf @@ -69,6 +69,7 @@ project: packs: - pack: ARM::CMSIS - pack: GigaDevice::GD32C10x_DFP + - pack: ARM::CMSIS-DSP misc: - for-compiler: AC6 C-CPP: diff --git a/Robot_V2/device/ang_sensor.cpp b/Robot_V2/device/ang_sensor.cpp index ae8c9cc..0bbb233 100644 --- a/Robot_V2/device/ang_sensor.cpp +++ b/Robot_V2/device/ang_sensor.cpp @@ -6,7 +6,6 @@ #include "gd32c10x_dma.h" #include "gd32c10x_gpio.h" #include "gd32c10x_spi.h" -#include #include #include #include diff --git a/Robot_V2/sys/health.cpp b/Robot_V2/sys/health.cpp index 74fc56f..6a799a3 100644 --- a/Robot_V2/sys/health.cpp +++ b/Robot_V2/sys/health.cpp @@ -4,7 +4,6 @@ #include "FOC.h" #include "adc.h" #include "flash.h" -#include "systick.h" extern sampler sampler; diff --git a/Robot_V2/sys/systick.cpp b/Robot_V2/sys/systick.cpp index aa5277f..adc49c2 100644 --- a/Robot_V2/sys/systick.cpp +++ b/Robot_V2/sys/systick.cpp @@ -35,12 +35,9 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. #include "systick.h" #include "Can.h" #include "config.h" -#include "core_cmFunc.h" #include "flash.h" #include "gd32c10x.h" -#include "gd32c10x_exti.h" #include "gd32c10x_fmc.h" -#include "initial.h" #include "motor.h" #include