cbb
d0198fdff7
refactor(build): 更新项目配置和链接器设置 - 修改GD32C103CB的ROM基地址和大小配置 - 更新系统时钟向量表偏移量设置 - 在cproject.yml中添加BIN输出格式支持 - 增加-O3优化级别和代码移除选项 - 更新csolution版本依赖 feat(device): 优化ADC采样和配置管理 - 将DengFOC依赖替换为FOC模块 - 从config.h引入配置常量 - 重命名FILTER_SIZE为ADC_FILTER_SIZE以提高清晰度 - 优化温度和电流采样滤波实现 refactor(algorithm): 简化FOC控制函数接口 - 为angle_control、velocity_control等函数移除不必要的参数 - 统一函数指针类型定义 - 优化电流计算函数的代码格式 - 调整PID控制器初始化参数
102 lines
2.9 KiB
C
102 lines
2.9 KiB
C
#ifndef REGIONS_GD32C103CB_H
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#define REGIONS_GD32C103CB_H
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//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
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//------ With VS Code: Open Preview for Configuration Wizard -------------------
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// <n> Auto-generated using information from packs
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// <i> Device Family Pack (DFP): GigaDevice::GD32C10x_DFP@1.0.1
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// <h> ROM Configuration
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// =======================
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// <h> __ROM0 (is rx memory: IROM1 from DFP)
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// <o> Base address <0x0-0xFFFFFFFF:8>
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// <i> Defines base address of memory region. Default: 0x08000000
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// <i> Contains Startup and Vector Table
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#define __ROM0_BASE 0x08011000
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// <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
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// <i> Defines size of memory region. Default: 0x00020000
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#define __ROM0_SIZE 0x0000C000
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// </h>
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// <h> __ROM1 (unused)
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// <o> Base address <0x0-0xFFFFFFFF:8>
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// <i> Defines base address of memory region.
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#define __ROM1_BASE 0x0
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// <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
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// <i> Defines size of memory region.
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#define __ROM1_SIZE 0x0
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// </h>
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// <h> __ROM2 (unused)
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// <o> Base address <0x0-0xFFFFFFFF:8>
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// <i> Defines base address of memory region.
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#define __ROM2_BASE 0x0
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// <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
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// <i> Defines size of memory region.
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#define __ROM2_SIZE 0x0
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// </h>
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// <h> __ROM3 (unused)
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// <o> Base address <0x0-0xFFFFFFFF:8>
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// <i> Defines base address of memory region.
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#define __ROM3_BASE 0x0
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// <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
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// <i> Defines size of memory region.
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#define __ROM3_SIZE 0x0
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// </h>
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// </h>
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// <h> RAM Configuration
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// =======================
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// <h> __RAM0 (is rwx memory: IRAM1 from DFP)
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// <o> Base address <0x0-0xFFFFFFFF:8>
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// <i> Defines base address of memory region. Default: 0x20000000
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// <i> Contains uninitialized RAM, Stack, and Heap
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#define __RAM0_BASE 0x20000000
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// <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
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// <i> Defines size of memory region. Default: 0x00008000
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#define __RAM0_SIZE 0x00008000
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// </h>
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// <h> __RAM1 (unused)
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// <o> Base address <0x0-0xFFFFFFFF:8>
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// <i> Defines base address of memory region.
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#define __RAM1_BASE 0x0
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// <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
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// <i> Defines size of memory region.
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#define __RAM1_SIZE 0x0
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// </h>
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// <h> __RAM2 (unused)
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// <o> Base address <0x0-0xFFFFFFFF:8>
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// <i> Defines base address of memory region.
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#define __RAM2_BASE 0x0
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// <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
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// <i> Defines size of memory region.
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#define __RAM2_SIZE 0x0
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// </h>
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// <h> __RAM3 (unused)
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// <o> Base address <0x0-0xFFFFFFFF:8>
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// <i> Defines base address of memory region.
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#define __RAM3_BASE 0x0
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// <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
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// <i> Defines size of memory region.
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#define __RAM3_SIZE 0x0
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// </h>
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// </h>
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// <h> Stack / Heap Configuration
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// <o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
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// <o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
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#define __STACK_SIZE 0x00000200
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#define __HEAP_SIZE 0x00000C00
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// </h>
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#endif /* REGIONS_GD32C103CB_H */
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