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feat(cbuild): 更新GD32C10x_DFP包到1.5.0版本并修复多个设备驱动文件

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更新了项目中使用的GD32C10x_DFP包从1.0.1版本升级到1.5.0版本，
同时更新了多个RTE设备驱动文件以匹配新版本固件，包括ADC、BKP、CAN、CRC、CTC、DAC、DBG、DMA、EXMC、EXTI、FMC等外设驱动。修复了CAN驱动中的消息传输逻辑，改进了错误处理机制，并统一了标志位获取函数的返回值处理方式。
This commit is contained in:
cbb
2026-05-05 23:39:10 +08:00
parent 46d4bfe8ef
commit c357a8af6f
65 changed files with 1814 additions and 1697 deletions
Download Patch File Download Diff File Expand all files Collapse all files
Robot_V2/RTE/Device/GD32C103CB/gd32c10x_fmc.c
+13 -10
View File
@@ -2,11 +2,11 @@
\file gd32c10x_fmc.c
\brief FMC driver
\version 2025-08-07, V1.6.0, firmware for GD32C10x
\version 2026-01-30, V1.7.0, firmware for GD32C10x
*/
/*
Copyright (c) 2025, GigaDevice Semiconductor Inc.
Copyright (c) 2026, GigaDevice Semiconductor Inc.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
@@ -33,7 +33,6 @@ OF SUCH DAMAGE.
*/
#include "gd32c10x_fmc.h"
#include "stdio.h"
/* FMC mask */
#define LOW_8BITS_MASK ((uint32_t)0x000000FFU)
@@ -508,7 +507,7 @@ fmc_state_enum ob_write_protection_enable(uint32_t ob_wp)
*/
fmc_state_enum ob_security_protection_config(uint8_t ob_spc)
{
uint8_t i;
uint32_t i;
uint32_t op_byte[4];
fmc_state_enum fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
for(i = 0U; i < 4U; i++){
@@ -574,7 +573,7 @@ fmc_state_enum ob_security_protection_config(uint8_t ob_spc)
*/
fmc_state_enum ob_user_write(uint8_t ob_fwdgt, uint8_t ob_deepsleep, uint8_t ob_stdby)
{
uint8_t i;
uint32_t i;
uint32_t temp;
uint32_t op_byte[4];
fmc_state_enum fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
@@ -582,7 +581,7 @@ fmc_state_enum ob_user_write(uint8_t ob_fwdgt, uint8_t ob_deepsleep, uint8_t ob_
for(i = 0U; i < 4U; i++){
op_byte[i] = OP_BYTE(i);
}
temp = ((uint8_t)((uint8_t)((uint8_t)(ob_fwdgt) | ob_deepsleep) | ob_stdby) | (OB_USER_MASK));
temp = (uint32_t)(((uint32_t)((uint32_t)(ob_fwdgt) | ob_deepsleep) | ob_stdby) | OB_USER_MASK);
op_byte[0] = ((uint32_t)(temp) << 16U) | ((op_byte[0] & LOW_16BITS_MASK));
if(FMC_READY == fmc_state){
@@ -632,7 +631,7 @@ fmc_state_enum ob_user_write(uint8_t ob_fwdgt, uint8_t ob_deepsleep, uint8_t ob_
fmc_state_enum ob_data_program(uint16_t ob_data)
{
uint8_t i;
uint32_t i;
uint32_t op_byte[4];
fmc_state_enum fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
for(i = 0U; i < 4U; i++){
@@ -774,17 +773,21 @@ void fmc_ecc_interrupt_disable(uint32_t interrupt)
FlagStatus fmc_ecc_interrupt_flag_get(uint32_t int_flag)
{
uint32_t intenable = 0U, flagstatus = 0U;
FlagStatus status = RESET;
/* get the interrupt enable bit status */
intenable = (FMC_REG_VAL(int_flag) & BIT(FMC_BIT_POS(int_flag)));
/* get the corresponding flag bit status */
flagstatus = (FMC_REG_VAL2(int_flag) & BIT(FMC_BIT_POS2(int_flag)));
if(flagstatus && intenable) {
return SET;
status = SET;
} else {
return RESET;
status = RESET;
}
/* return the state of corresponding FMC interrupt flag */
return status;
}
/*!
@@ -989,7 +992,7 @@ void fmc_interrupt_flag_clear(uint32_t flag)
static fmc_state_enum fmc_state_get(void)
{
fmc_state_enum fmc_state = FMC_READY;
if((uint32_t)0x00U != (FMC_STAT & FMC_STAT_BUSY)){
fmc_state = FMC_BUSY;
}else{