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feat(cbuild): 更新GD32C10x_DFP包到1.5.0版本并修复多个设备驱动文件

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更新了项目中使用的GD32C10x_DFP包从1.0.1版本升级到1.5.0版本，
同时更新了多个RTE设备驱动文件以匹配新版本固件，包括ADC、BKP、CAN、CRC、CTC、DAC、DBG、DMA、EXMC、EXTI、FMC等外设驱动。修复了CAN驱动中的消息传输逻辑，改进了错误处理机制，并统一了标志位获取函数的返回值处理方式。
This commit is contained in:
cbb
2026-05-05 23:39:10 +08:00
parent 46d4bfe8ef
commit c357a8af6f
65 changed files with 1814 additions and 1697 deletions
Download Patch File Download Diff File Expand all files Collapse all files
Robot_V2/RTE/Device/GD32C103CB/gd32c10x_misc.c
+14 -28
View File
@@ -2,11 +2,11 @@
\file gd32c10x_misc.c
\brief MISC driver
\version 2025-08-07, V1.6.0, firmware for GD32C10x
\version 2026-01-30, V1.7.0, firmware for GD32C10x
*/
/*
Copyright (c) 2025, GigaDevice Semiconductor Inc.
Copyright (c) 2026, GigaDevice Semiconductor Inc.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
@@ -63,45 +63,31 @@ void nvic_irq_enable(IRQn_Type nvic_irq,
uint8_t nvic_irq_pre_priority,
uint8_t nvic_irq_sub_priority)
{
uint32_t temp_priority = 0x00U, temp_pre = 0x00U, temp_sub = 0x00U;
uint32_t nvic_prigroup, nvic_priority;
/* use the priority group value to get the temp_pre and the temp_sub */
switch((SCB->AIRCR) & (uint32_t)0x700U) {
/* check current priority group */
switch(SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) {
case NVIC_PRIGROUP_PRE0_SUB4:
temp_pre = 0U;
temp_sub = 0x4U;
break;
case NVIC_PRIGROUP_PRE1_SUB3:
temp_pre = 1U;
temp_sub = 0x3U;
break;
case NVIC_PRIGROUP_PRE2_SUB2:
temp_pre = 2U;
temp_sub = 0x2U;
break;
case NVIC_PRIGROUP_PRE3_SUB1:
temp_pre = 3U;
temp_sub = 0x1U;
break;
case NVIC_PRIGROUP_PRE4_SUB0:
temp_pre = 4U;
temp_sub = 0x0U;
break;
default:
nvic_priority_group_set(NVIC_PRIGROUP_PRE2_SUB2);
temp_pre = 2U;
temp_sub = 0x2U;
break;
}
/* get the temp_priority to fill the NVIC->IP register */
temp_priority = (uint32_t)nvic_irq_pre_priority << (0x4U - temp_pre);
temp_priority |= nvic_irq_sub_priority & (0x0FU >> (0x4U - temp_sub));
temp_priority = temp_priority << 0x04U;
NVIC->IP[nvic_irq] = (uint8_t)temp_priority;
/* get the priority group value */
nvic_prigroup = NVIC_GetPriorityGrouping();
/* encoding the pre-emption, subpriority priority */
nvic_priority = NVIC_EncodePriority(nvic_prigroup, (uint32_t)nvic_irq_pre_priority, (uint32_t)nvic_irq_sub_priority);
/* set priority */
NVIC_SetPriority(nvic_irq, nvic_priority);
/* enable the selected IRQ */
NVIC->ISER[nvic_irq >> 0x05U] = (uint32_t)0x01U << (nvic_irq & (uint8_t)0x1FU);
NVIC_EnableIRQ(nvic_irq);
}
/*!
@@ -113,7 +99,7 @@ void nvic_irq_enable(IRQn_Type nvic_irq,
void nvic_irq_disable(IRQn_Type nvic_irq)
{
/* disable the selected IRQ.*/
NVIC->ICER[nvic_irq >> 0x05U] = (uint32_t)0x01U << (nvic_irq & (uint8_t)0x1FU);
NVIC->ICER[(uint32_t)nvic_irq >> 0x05U] = (uint32_t)0x01U << ((uint32_t)nvic_irq & (uint8_t)0x1FU);
}
/*!