feat(cbuild): 更新GD32C10x_DFP包到1.5.0版本并修复多个设备驱动文件

更新了项目中使用的GD32C10x_DFP包从1.0.1版本升级到1.5.0版本,
同时更新了多个RTE设备驱动文件以匹配新版本固件,包括ADC、BKP、CAN、CRC、CTC、DAC、DBG、DMA、EXMC、EXTI、FMC等外设驱动。修复了CAN驱动中的消息传输逻辑,改进了错误处理机制,并统一了标志位获取函数的返回值处理方式。
This commit is contained in:
cbb
2026-05-05 23:39:10 +08:00
parent 46d4bfe8ef
commit c357a8af6f
65 changed files with 1814 additions and 1697 deletions
+17 -30
View File
@@ -2,11 +2,11 @@
\file gd32c10x_spi.c
\brief SPI driver
\version 2025-08-07, V1.6.0, firmware for GD32C10x
\version 2026-01-30, V1.7.0, firmware for GD32C10x
*/
/*
Copyright (c) 2025, GigaDevice Semiconductor Inc.
Copyright (c) 2026, GigaDevice Semiconductor Inc.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
@@ -564,11 +564,14 @@ void spi_crc_next(uint32_t spi_periph)
*/
uint16_t spi_crc_get(uint32_t spi_periph,uint8_t crc)
{
uint16_t crc_value;
if(SPI_CRC_TX == crc){
return ((uint16_t)(SPI_TCRC(spi_periph)));
crc_value = ((uint16_t)(SPI_TCRC(spi_periph)));
}else{
return ((uint16_t)(SPI_RCRC(spi_periph)));
crc_value = ((uint16_t)(SPI_RCRC(spi_periph)));
}
return crc_value;
}
/*!
@@ -670,28 +673,6 @@ void spi_quad_read_enable(uint32_t spi_periph)
SPI_QCTL(spi_periph) |= (uint32_t)SPI_QCTL_QRD;
}
/*!
\brief enable SPI quad wire mode SPI_IO2 and SPI_IO3 pin output
\param[in] spi_periph: SPIx(only x=0)
\param[out] none
\retval none
*/
void spi_quad_io23_output_enable(uint32_t spi_periph)
{
SPI_QCTL(spi_periph) |= (uint32_t)SPI_QCTL_IO23_DRV;
}
/*!
\brief disable SPI quad wire mode SPI_IO2 and SPI_IO3 pin output
\param[in] spi_periph: SPIx(only x=0)
\param[out] none
\retval none
*/
void spi_quad_io23_output_disable(uint32_t spi_periph)
{
SPI_QCTL(spi_periph) &= (uint32_t)(~SPI_QCTL_IO23_DRV);
}
/*!
\brief enable SPI and I2S interrupt
\param[in] spi_periph: SPIx(x=0,1,2)
@@ -773,6 +754,7 @@ void spi_i2s_interrupt_disable(uint32_t spi_periph, uint8_t interrupt)
*/
FlagStatus spi_i2s_interrupt_flag_get(uint32_t spi_periph, uint8_t interrupt)
{
FlagStatus status = RESET;
uint32_t reg1 = SPI_STAT(spi_periph);
uint32_t reg2 = SPI_CTL1(spi_periph);
@@ -817,10 +799,12 @@ FlagStatus spi_i2s_interrupt_flag_get(uint32_t spi_periph, uint8_t interrupt)
}
/* get SPI/I2S interrupt flag status */
if((0U != reg1) && (0U != reg2)){
return SET;
status = SET;
}else{
return RESET;
status = RESET;
}
return status;
}
/*!
@@ -847,9 +831,12 @@ FlagStatus spi_i2s_interrupt_flag_get(uint32_t spi_periph, uint8_t interrupt)
*/
FlagStatus spi_i2s_flag_get(uint32_t spi_periph, uint32_t flag)
{
FlagStatus status = RESET;
if(RESET != (SPI_STAT(spi_periph) & flag)){
return SET;
status = SET;
}else{
return RESET;
status = RESET;
}
return status;
}