cbb
c0b5f6902b
- 定义SOFTWARE_VERSION 26.1.19.1 - 定义HARDWARE_VERSION 25.12.01.0 - 定义BOOT_VERSION 26.1.12.0 feat(motor-control): 实现FOC控制算法速度环优化 refactor(can-protocol): 升级CANFD通信协议支持版本管理 - 实现版本号管理和CANFD_VERSION_ID协议 - 扩展CMD_ID消息解析支持PID参数动态配置 - 添加版本管理器实例并实现版本信息发送功能 - 优化CANFD异步发送数据长度判断逻辑 fix(angle-sensor): 修正角度传感器方向和偏移校准 - 添加ANGLESENS_OFFSET补偿参数 - 反转角度传感器读数方向(DIR = -1.0f) - 在角度计算中应用负向因子和偏移量 chore(memory-layout): 调整Flash存储布局和版本配置 - 扩展BOOTLOADER_SIZE从16KB到24KB - 更新APPLATEST_START_ADDR和APPBACK_START_ADDR偏移 - 重新分配OTA配置参数存储区域 - 增加EEP_DEBUG调试开关 refactor(pid-controller): 增强PID控制器功能接口 - 添加set_P_percent方法支持百分比参数设置 - 格式化PID计算代码提升可读性 - 保留积分和微分环节的约束保护机制
102 lines
2.9 KiB
C
102 lines
2.9 KiB
C
#ifndef REGIONS_GD32C103CB_H
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#define REGIONS_GD32C103CB_H
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//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
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//------ With VS Code: Open Preview for Configuration Wizard -------------------
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// <n> Auto-generated using information from packs
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// <i> Device Family Pack (DFP): GigaDevice::GD32C10x_DFP@1.0.1
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// <h> ROM Configuration
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// =======================
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// <h> __ROM0 (is rx memory: IROM1 from DFP)
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// <o> Base address <0x0-0xFFFFFFFF:8>
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// <i> Defines base address of memory region. Default: 0x08000000
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// <i> Contains Startup and Vector Table
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#define __ROM0_BASE 0x08012000
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// <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
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// <i> Defines size of memory region. Default: 0x00020000
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#define __ROM0_SIZE 0x0000C000
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// </h>
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// <h> __ROM1 (unused)
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// <o> Base address <0x0-0xFFFFFFFF:8>
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// <i> Defines base address of memory region.
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#define __ROM1_BASE 0x0
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// <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
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// <i> Defines size of memory region.
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#define __ROM1_SIZE 0x0
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// </h>
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// <h> __ROM2 (unused)
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// <o> Base address <0x0-0xFFFFFFFF:8>
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// <i> Defines base address of memory region.
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#define __ROM2_BASE 0x0
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// <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
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// <i> Defines size of memory region.
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#define __ROM2_SIZE 0x0
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// </h>
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// <h> __ROM3 (unused)
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// <o> Base address <0x0-0xFFFFFFFF:8>
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// <i> Defines base address of memory region.
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#define __ROM3_BASE 0x0
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// <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
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// <i> Defines size of memory region.
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#define __ROM3_SIZE 0x0
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// </h>
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// </h>
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// <h> RAM Configuration
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// =======================
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// <h> __RAM0 (is rwx memory: IRAM1 from DFP)
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// <o> Base address <0x0-0xFFFFFFFF:8>
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// <i> Defines base address of memory region. Default: 0x20000000
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// <i> Contains uninitialized RAM, Stack, and Heap
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#define __RAM0_BASE 0x20000000
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// <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
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// <i> Defines size of memory region. Default: 0x00008000
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#define __RAM0_SIZE 0x00008000
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// </h>
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// <h> __RAM1 (unused)
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// <o> Base address <0x0-0xFFFFFFFF:8>
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// <i> Defines base address of memory region.
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#define __RAM1_BASE 0x0
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// <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
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// <i> Defines size of memory region.
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#define __RAM1_SIZE 0x0
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// </h>
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// <h> __RAM2 (unused)
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// <o> Base address <0x0-0xFFFFFFFF:8>
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// <i> Defines base address of memory region.
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#define __RAM2_BASE 0x0
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// <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
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// <i> Defines size of memory region.
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#define __RAM2_SIZE 0x0
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// </h>
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// <h> __RAM3 (unused)
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// <o> Base address <0x0-0xFFFFFFFF:8>
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// <i> Defines base address of memory region.
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#define __RAM3_BASE 0x0
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// <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
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// <i> Defines size of memory region.
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#define __RAM3_SIZE 0x0
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// </h>
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// </h>
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// <h> Stack / Heap Configuration
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// <o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
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// <o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
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#define __STACK_SIZE 0x00000200
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#define __HEAP_SIZE 0x00000C00
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// </h>
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#endif /* REGIONS_GD32C103CB_H */
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